Datasheet

Instruction Set Description

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4.6.4.7 INCDA

* INCDA Double-increment 20-bit destination register

INCDA Rdst

Syntax

Operation Rdst + 2 → Rdst

ADDA #2,Rdst

Emulation

Description The destination register is incremented by two. The original contents are lost.

Status Bits N: Set if result is negative, reset if positive

Z: Set if Rdst contained 0FFFFEh, reset otherwise

Set if Rdst contained 0FFFEh, reset otherwise

Set if Rdst contained 0FEh, reset otherwise

C: Set if Rdst contained 0FFFFEh or 0FFFFFh, reset otherwise

Set if Rdst contained 0FFFEh or 0FFFFh, reset otherwise

Set if Rdst contained 0FEh or 0FFh, reset otherwise

V: Set if Rdst contained 07FFFEh or 07FFFFh, reset otherwise

Set if Rdst contained 07FFEh or 07FFFh, reset otherwise

Set if Rdst contained 07Eh or 07Fh, reset otherwise

Mode Bits OSCOFF, CPUOFF, and GIE are not affected.

Example The 20-bit value in R5 is incremented by two.

INCDA R5 ; Increment R5 by two

266

CPUX SLAU144J–December 2004–Revised July 2013

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