Datasheet

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Instruction Set Description

4.6.4.6 DECDA

* DECDA Double-decrement 20-bit destination register

DECDA Rdst

Syntax

Operation Rdst – 2 → Rdst

SUBA #2,Rdst

Emulation

Description The destination register is decremented by two. The original contents are lost.

Status Bits N: Set if result is negative, reset if positive

Z: Set if Rdst contained 2, reset otherwise

C: Reset if Rdst contained 0 or 1, set otherwise

V: Set if an arithmetic overflow occurs, otherwise reset

Mode Bits OSCOFF, CPUOFF, and GIE are not affected.

Example The 20-bit value in R5 is decremented by 2.

DECDA R5 ; Decrement R5 by two

265

SLAU144J–December 2004–Revised July 2013 CPUX

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