Datasheet

www.ti.com
Instruction Set Description
4.6.4.4 CLRA
* CLRA Clear 20-bit destination register
CLRA Rdst
Syntax
Operation 0 Rdst
MOVA #0,Rdst
Emulation
Description The destination register is cleared.
Status Bits Status bits are not affected.
Example The 20-bit value in R10 is cleared.
CLRA R10 ; 0 -> R10
263
SLAU144JDecember 2004Revised July 2013 CPUX
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated