Datasheet

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4.6.4.2 BRA
* BRA Branch to destination
BRA dst
Syntax
Operation dst → PC
MOVA dst,PC
Emulation
Description An unconditional branch is taken to a 20-bit address anywhere in the full address
space. All seven source addressing modes can be used. The branch instruction is an
address-word instruction. If the destination address is contained in a memory location
X, it is contained in two ascending words: X (LSBs) and (X + 2) (MSBs).
Status Bits N: Not affected
Z: Not affected
C: Not affected
V: Not affected
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Examples Examples for all addressing modes are given.
Immediate mode: Branch to label EDE located anywhere in the 20-bit address space or
branch directly to address.
BRA #EDE ; MOVA #imm20,PC
BRA #01AA04h
Symbolic mode: Branch to the 20-bit address contained in addresses EXEC (LSBs) and
EXEC+2 (MSBs). EXEC is located at the address (PC + X) where X is within +32 K.
Indirect addressing.
BRA EXEC ; MOVA z16(PC),PC
Note: If the 16-bit index is not sufficient, a 20-bit index may be used with the following
instruction.
MOVX.A EXEC,PC ; 1M byte range with 20-bit index
Absolute mode: Branch to the 20-bit address contained in absolute addresses EXEC
(LSBs) and EXEC+2 (MSBs). Indirect addressing.
BRA &EXEC ; MOVA &abs20,PC
Register mode: Branch to the 20-bit address contained in register R5. Indirect R5.
BRA R5 ; MOVA R5,PC
Indirect mode: Branch to the 20-bit address contained in the word pointed to by register
R5 (LSBs). The MSBs have the address (R5 + 2). Indirect, indirect R5.
BRA @R5 ; MOVA @R5,PC
259
SLAU144J–December 2004–Revised July 2013 CPUX
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