Datasheet

15
8 7 0
Low ByteHigh Byte
Before SWPBX.A
After SWPBX.A
X
19
16
31 20
X
15
8 7 0
High ByteLow Byte
0
19
16
31 20
X
15 8 7 0
15 8 7 0
Low Byte
Low ByteHigh Byte
High Byte
Before SWPBX.A
After SWPBX.A
X
X
19
19
16
16
Instruction Set Description www.ti.com
4.6.3.34 SWPBX
SWPBX.A Swap bytes of lower word
SWPBX.[W] Swap bytes of word
SWPBX.A dst
Syntax
SWPBX dst or SWPBX.W dst
Operation dst.15:8 ↔ dst.7:0
Description Register mode: Rn.15:8 are swapped with Rn.7:0. When the .A extension is used,
Rn.19:16 are unchanged. When the .W extension is used, Rn.19:16 are cleared.
Other modes: When the .A extension is used, bits 31:20 of the destination address are
cleared, bits 19:16 are left unchanged, and bits 15:8 are swapped with bits 7:0. When
the .W extension is used, bits 15:8 are swapped with bits 7:0 of the addressed word.
Status Bits Status bits are not affected.
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example Exchange the bytes of RAM address-word EDE
MOVX.A #23456h,&EDE ; 23456h -> EDE
SWPBX.A EDE ; 25634h -> EDE
Example Exchange the bytes of R5
MOVA #23456h,R5 ; 23456h -> R5
SWPBX.W R5 ; 05634h -> R5
Figure 4-54. Swap Bytes SWPBX.A Register Mode
Figure 4-55. Swap Bytes SWPBX.A In Memory
252
CPUX SLAU144J–December 2004–Revised July 2013
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