Datasheet

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4.6.3.28 RRCX
RRCX.A Rotate right through carry the 20-bit operand
RRCX.[W] Rotate right through carry the 16-bit operand
RRCX.B Rotate right through carry the 8-bit operand
RRCX.A Rdst
Syntax
RRCX.W Rdst
RRCX Rdst
RRCX.B Rdst
RRCX.A dst
RRCX dst or RRCX.W dst
RRCX.B dst
Operation C → MSB → MSB–1 ... LSB+1 → LSB → C
Description Register mode for the destination: the destination operand is shifted right by one bit
position as shown in Figure 4-50. The word instruction RRCX.W clears the bits
Rdst.19:16, the byte instruction RRCX.B clears the bits Rdst.19:8. The carry bit C is
shifted into the MSB, the LSB is shifted into the carry bit.
All other modes for the destination: the destination operand is shifted right by one bit
position as shown in Figure 4-51. The carry bit C is shifted into the MSB, the LSB is
shifted into the carry bit. All addressing modes, with the exception of the Immediate
mode, are possible in the full memory.
Status Bits N: Set if result is negative
.A: dst.19 = 1, reset if dst.19 = 0
.W: dst.15 = 1, reset if dst.15 = 0
.B: dst.7 = 1, reset if dst.7 = 0
Z: Set if result is zero, reset otherwise
C: Loaded from the LSB
V: Reset
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example The 20-bit operand at address EDE is shifted right by one position. The MSB is loaded
with 1.
SETC ; Prepare carry for MSB
RRCX.A EDE ; EDE = EDE » 1 + 80000h
245
SLAU144J–December 2004–Revised July 2013 CPUX
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