Datasheet

Preface

SLAU144J–December 2004–Revised July 2013

Read This First

About This Manual

This manual discusses modules and peripherals of the MSP430x2xx family of devices. Each discussion

presents the module or peripheral in a general sense. Not all features and functions of all modules or

peripherals are present on all devices. In addition, modules or peripherals may differ in their exact

implementation between device families, or may not be fully implemented on an individual device or

device family.

Pin functions, internal signal connections, and operational paramenters differ from device to device. The

user should consult the device-specific datasheet for these details.

Related Documentation From Texas Instruments

For related documentation see the web site http://www.ti.com/msp430.

FCC Warning

This equipment is intended for use in a laboratory test environment only. It generates, uses, and can

radiate radio frequency energy and has not been tested for compliance with the limits of computing

devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable

protection against radio frequency interference. Operation of this equipment in other environments may

cause interference with radio communications, in which case the user at his own expense will be required

to take whatever measures may be required to correct this interference.

Notational Conventions

Program examples, are shown in a special typeface.

Glossary

ACLK Auxiliary Clock See Basic Clock Module

ADC Analog-to-Digital Converter

BOR Brown-Out Reset See System Resets, Interrupts, and Operating Modes

BSL Bootstrap Loader See www.ti.com/msp430for application reports

CPU Central Processing Unit See RISC 16-Bit CPU

DAC Digital-to-Analog Converter

DCO Digitally Controlled Oscillator See Basic Clock Module

dst Destination See RISC 16-Bit CPU

FLL Frequency Locked Loop See FLL+in MSP430x4xx Family User’s Guide

GIE General Interrupt Enable See System Resets, Interrupts, and Operating Modes

INT(N/2) Integer portion of N/2

I/O Input/Output See Digital I/O

ISR Interrupt Service Routine

LSB Least-Significant Bit

LSD Least-Significant Digit

LPM Low-Power Mode See System Resets, Interrupts, and Operating Modes

MAB Memory Address Bus

MCLK Master Clock See Basic Clock Module

SLAU144J–December 2004–Revised July 2013 Read This First

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