Datasheet

Contents
Preface ...................................................................................................................................... 21
1 Introduction ...................................................................................................................... 23
1.1 Architecture ................................................................................................................. 24
1.2 Flexible Clock System .................................................................................................... 24
1.3 Embedded Emulation ..................................................................................................... 25
1.4 Address Space ............................................................................................................. 25
1.4.1 Flash/ROM ........................................................................................................ 25
1.4.2 RAM ................................................................................................................ 26
1.4.3 Peripheral Modules ............................................................................................... 26
1.4.4 Special Function Registers (SFRs) ............................................................................ 26
1.4.5 Memory Organization ............................................................................................ 26
1.5 MSP430x2xx Family Enhancements .................................................................................... 27
2 System Resets, Interrupts, and Operating Modes .................................................................. 28
2.1 System Reset and Initialization .......................................................................................... 29
2.1.1 Brownout Reset (BOR) .......................................................................................... 29
2.1.2 Device Initial Conditions After System Reset ................................................................. 30
2.2 Interrupts .................................................................................................................... 31
2.2.1 (Non)-Maskable Interrupts (NMI) ............................................................................... 31
2.2.2 Maskable Interrupts .............................................................................................. 34
2.2.3 Interrupt Processing .............................................................................................. 35
2.2.4 Interrupt Vectors .................................................................................................. 37
2.3 Operating Modes .......................................................................................................... 38
2.3.1 Entering and Exiting Low-Power Modes ...................................................................... 40
2.4 Principles for Low-Power Applications .................................................................................. 40
2.5 Connection of Unused Pins .............................................................................................. 41
3 CPU ................................................................................................................................. 42
3.1 CPU Introduction .......................................................................................................... 43
3.2 CPU Registers ............................................................................................................. 44
3.2.1 Program Counter (PC) ........................................................................................... 44
3.2.2 Stack Pointer (SP) ................................................................................................ 45
3.2.3 Status Register (SR) ............................................................................................. 45
3.2.4 Constant Generator Registers CG1 and CG2 ................................................................ 46
3.2.5 General-Purpose Registers R4 to R15 ........................................................................ 47
3.3 Addressing Modes ......................................................................................................... 47
3.3.1 Register Mode .................................................................................................... 49
3.3.2 Indexed Mode ..................................................................................................... 50
3.3.3 Symbolic Mode ................................................................................................... 51
3.3.4 Absolute Mode .................................................................................................... 52
3.3.5 Indirect Register Mode ........................................................................................... 53
3.3.6 Indirect Autoincrement Mode ................................................................................... 54
3.3.7 Immediate Mode .................................................................................................. 55
3.4 Instruction Set .............................................................................................................. 56
3.4.1 Double-Operand (Format I) Instructions ....................................................................... 57
3.4.2 Single-Operand (Format II) Instructions ....................................................................... 58
3.4.3 Jumps .............................................................................................................. 59
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Contents SLAU144J–December 2004–Revised July 2013
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