Datasheet

Instruction Set Description

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4.6.2.19 DINT

* DINT Disable (general) interrupts

DINT

Syntax

Operation 0 → GIE

(0FFF7h .AND. SR → SR / .NOT. src .AND. dst → dst)

BIC #8,SR

Emulation

Description All interrupts are disabled.

The constant 08h is inverted and logically ANDed with the SR. The result is placed into

the SR.

Status Bits Status bits are not affected.

Mode Bits GIE is reset. OSCOFF and CPUOFF are not affected.

Example The general interrupt enable (GIE) bit in the SR is cleared to allow a nondisrupted move

of a 32-bit counter. This ensures that the counter is not modified during the move by any

interrupt.

DINT ; All interrupt events using the GIE bit are disabled

NOP

MOV COUNTHI,R5 ; Copy counter

MOV COUNTLO,R6

EINT ; All interrupt events using the GIE bit are enabled

NOTE: Disable interrupt

If any code sequence needs to be protected from interruption, DINT should be executed at

least one instruction before the beginning of the uninterruptible sequence, or it should be

followed by a NOP instruction.

182

CPUX SLAU144J–December 2004–Revised July 2013

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