Datasheet
www.ti.com
MSP430 and MSP430X Instructions
4.5.2.7.3 MSP430X Address Instruction Cycles and Lengths
Table 4-19 lists the length and the CPU cycles for all addressing modes of the MSP430X address
instructions.
Table 4-19. Address Instruction Cycles and Length
Execution Time Length of Instruction
Addressing Mode
(MCLK Cycles) (Words)
Example
CMPA CMPA
MOVA
Source Destination ADDA MOVA ADDA
BRA
SUBA SUBA
Rn Rn 1 1 1 1
CMPA R5,R8
PC 2 2 1 1
SUBA R9,PC
x(Rm) 4 – 2 –
MOVA R5,4(R6)
EDE 4 – 2 –
MOVA R8,EDE
&EDE 4 – 2 –
MOVA R5,&EDE
@Rn Rm 3 – 1 –
MOVA @R5,R8
PC 3 – 1 –
MOVA @R9,PC
@Rn+ Rm 3 – 1 –
MOVA @R5+,R8
PC 3 – 1 –
MOVA @R9+,PC
#N Rm 2 3 2 2
CMPA #20,R8
PC 3 3 2 2
SUBA #FE000h,PC
x(Rn) Rm 4 – 2 –
MOVA 2(R5),R8
PC 4 – 2 –
MOVA 2(R6),PC
EDE Rm 4 – 2 –
MOVA EDE,R8
PC 4 – 2 –
MOVA EDE,PC
&EDE Rm 4 – 2 –
MOVA &EDE,R8
PC 4 – 2 –
MOVA &EDE,PC
159
SLAU144J–December 2004–Revised July 2013 CPUX
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated