Datasheet

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 1 1 Source 19:16 A/L Rsvd Destination 19:16
Op-code
Rsrc
Ad B/W As Rdst
XORX.A #12345h,45678h(R15)
0 0 0 1 1 1 0 0 4
14 (XOR)
0 (PC)
1 1 3 15 (R15)
18xx extension word 12345h
@PC+
X(Rn)
Source 15:0
Destination 15:0
Immediate operand LSBs: 2345h
Index destination LSBs: 5678h
01: Address
word
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 1 1 00 ZC # A/L Rsvd (n-1)/Rn
Op-code
Rsrc
Ad B/W As Rdst
XORX.A R9,R8
0 0 0 1 1 0 0 0 0 0 0
14(XOR)
9
0 1 0 8(R8)
XORX instruction Source R9
0: Use Carry
1: Repetition count
in bits 3:0
01:Address word
Destination
register mode
Source
register mode
Destination R8
MSP430 and MSP430X Instructions www.ti.com
Figure 4-26. Example for Extended Register/Register Instruction
Figure 4-27. Example for Extended Immediate/Indexed Instruction
150
CPUX SLAU144J–December 2004–Revised July 2013
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