Datasheet

www.ti.com MSP430 and MSP430X Instructions
Table 4-7. Emulated Instructions (continued)
Status Bits
(1)
Instruction Explanation Emulation
V N Z C
Invert dst * * * *
INV(.B) dst XOR(.B) #–1,dst
No operation – – – –
NOP MOV R3,R3
Pop operand from stack – – – –
POP dst MOV @SP+,dst
Return from subroutine – – – –
RET MOV @SP+,PC
Shift left dst arithmetically * * * *
RLA(.B) dst ADD(.B) dst,dst
Shift left dst logically through Carry * * * *
RLC(.B) dst ADDC(.B) dst,dst
Subtract Carry from dst * * * *
SBC(.B) dst SUBC(.B) #0,dst
Set Carry bit – – – 1
SETC BIS #1,SR
Set Negative bit – 1 – –
SETN BIS #4,SR
Set Zero bit – – 1 –
SETZ BIS #2,SR
Test dst (compare with 0) 0 * * 1
TST(.B) dst CMP(.B) #0,dst
4.5.1.5 MSP430 Instruction Execution
The number of CPU clock cycles required for an instruction depends on the instruction format and the
addressing modes used – not the instruction itself. The number of clock cycles refers to MCLK.
4.5.1.5.1 Instruction Cycles and Length for Interrupt, Reset, and Subroutines
Table 4-8 lists the length and the CPU cycles for reset, interrupts, and subroutines.
Table 4-8. Interrupt, Return, and Reset Cycles and Length
Execution Time Length of Instruction
Action
(MCLK Cycles) (Words)
Return from interrupt RETI 3
(1)
1
Return from subroutine RET 3 1
Interrupt request service (cycles needed before first
5
(2)
–
instruction)
WDT reset 4 –
Reset ( RST/NMI) 4 –
(1)
The cycle count in MSP430 CPU is 5.
(2)
The cycle count in MSP430 CPU is 6.
4.5.1.5.2 Format II (Single-Operand) Instruction Cycles and Lengths
Table 4-9 lists the length and the CPU cycles for all addressing modes of the MSP430 single-operand
instructions.
Table 4-9. MSP430 Format II Instruction Cycles and Length
No. of Cycles
Length of
Addressing Mode Example
RRA, RRC
Instruction
PUSH CALL
SWPB, SXT
Rn 1 3 3
(1)
1
SWPB R5
@Rn 3 3
(1)
4 1
RRC @R9
@Rn+ 3 3
(1)
4
(2)
1
SWPB @R10+
(1)
The cycle count in MSP430 CPU is 4.
(2)
The cycle count in MSP430 CPU is 5. Also, the cycle count is 5 for X(Rn) addressing mode, when
Rn = SP.
145
SLAU144J–December 2004–Revised July 2013 CPUX
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