Datasheet

15 7 6 5 4 0
Op-code B/W Ad Rdst
Destination15:0
www.ti.com MSP430 and MSP430X Instructions
Table 4-4. MSP430 Double-Operand Instructions
Status Bits
(1)
S-Reg, D-
Mnemonic Operation
Reg
V N Z C
MOV(.B) src,dst src → dst - - - -
ADD(.B) src,dst src + dst → dst * * * *
ADDC(.B) src,dst src + dst + C → dst * * * *
SUB(.B) src,dst dst + .not.src + 1 → dst * * * *
SUBC(.B) src,dst dst + .not.src + C → dst * * * *
CMP(.B) src,dst dst → src * * * *
DADD(.B) src,dst src + dst + C → dst (decimally) * * * *
BIT(.B) src,dst src .and. dst 0 * * Z
BIC(.B) src,dst .not.src .and. dst → dst - - - -
BIS(.B) src,dst src .or. dst → dst - - - -
XOR(.B) src,dst src .xor. dst → dst * * * Z
AND(.B) src,dst src .and. dst → dst 0 * * Z
(1)
* = Status bit is affected.
- = Status bit is not affected.
0 = Status bit is cleared.
1 = Status bit is set.
4.5.1.2 MSP430 Single-Operand (Format II) Instructions
Figure 4-22 shows the format for MSP430 single-operand instructions, except RETI. The destination word
is appended for the Indexed, Symbolic, Absolute, and Immediate modes. Table 4-5 lists the seven single-
operand instructions.
Figure 4-22. MSP430 Single-Operand Instructions
Table 4-5. MSP430 Single-Operand Instructions
Status Bits
(1)
S-Reg, D-
Mnemonic Operation
Reg
V N Z C
RRC(.B) dst C → MSB →.......LSB → C * * * *
RRA(.B) dst MSB → MSB →....LSB → C 0 * * *
PUSH(.B) src SP - 2 → SP, src → SP – – – –
SWPB dst bit 15...bit 8 ↔ bit 7...bit 0 – – – –
CALL dst Call subroutine in lower 64KB – – – –
RETI TOS → SR, SP + 2 → SP * * * *
TOS → PC,SP + 2 → SP
Register mode: bit 7 → bit 8...bit 19
SXT dst 0 * * Z
Other modes: bit 7 → bit 8...bit 15
(1)
* = Status bit is affected.
– = Status bit is not affected.
0 = Status bit is cleared.
1 = Status bit is set.
143
SLAU144J–December 2004–Revised July 2013 CPUX
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