Datasheet

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List of Figures
1-1. MSP430 Architecture ..................................................................................................... 24
1-2. Memory Map ............................................................................................................... 25
1-3. Bits, Bytes, and Words in a Byte-Organized Memory ................................................................ 26
2-1. Power-On Reset and Power-Up Clear Schematic .................................................................... 29
2-2. Brownout Timing........................................................................................................... 30
2-3. Interrupt Priority............................................................................................................ 31
2-4. Block Diagram of (Non)-Maskable Interrupt Sources................................................................. 32
2-5. NMI Interrupt Handler..................................................................................................... 34
2-6. Interrupt Processing....................................................................................................... 35
2-7. Return From Interrupt..................................................................................................... 36
2-8. Typical Current Consumption of 'F21x1 Devices vs Operating Modes............................................. 38
2-9. Operating Modes For Basic Clock System............................................................................. 39
3-1. CPU Block Diagram....................................................................................................... 44
3-2. Program Counter .......................................................................................................... 44
3-3. Stack Counter.............................................................................................................. 45
3-4. Stack Usage................................................................................................................ 45
3-5. PUSH SP - POP SP Sequence ......................................................................................... 45
3-6. Status Register Bits ....................................................................................................... 46
3-7. Register-Byte/Byte-Register Operations................................................................................ 47
3-8. Operand Fetch Operation ................................................................................................ 54
3-9. Double Operand Instruction Format .................................................................................... 57
3-10. Single Operand Instruction Format...................................................................................... 58
3-11. Jump Instruction Format.................................................................................................. 59
3-12. Core Instruction Map...................................................................................................... 62
3-13. Decrement Overlap........................................................................................................ 80
3-14. Main Program Interrupt.................................................................................................. 100
3-15. Destination Operand – Arithmetic Shift Left .......................................................................... 101
3-16. Destination Operand - Carry Left Shift ................................................................................ 102
3-17. Destination Operand – Arithmetic Right Shift ........................................................................ 103
3-18. Destination Operand - Carry Right Shift .............................................................................. 104
3-19. Destination Operand - Byte Swap ..................................................................................... 111
3-20. Destination Operand - Sign Extension ................................................................................ 112
4-1. MSP430X CPU Block Diagram ........................................................................................ 117
4-2. PC Storage on the Stack for Interrupts ............................................................................... 118
4-3. Program Counter......................................................................................................... 119
4-4. PC Storage on the Stack for CALLA .................................................................................. 119
4-5. Stack Pointer ............................................................................................................. 120
4-6. Stack Usage .............................................................................................................. 120
4-7. PUSHX.A Format on the Stack ........................................................................................ 120
4-8. PUSH SP, POP SP Sequence ......................................................................................... 120
4-9. SR Bits .................................................................................................................... 121
4-10. Register-Byte/Byte-Register Operation ............................................................................... 123
4-11. Register-Word Operation ............................................................................................... 123
4-12. Word-Register Operation ............................................................................................... 124
4-13. Register – Address-Word Operation .................................................................................. 124
4-14. Address-Word – Register Operation .................................................................................. 125
4-15. Indexed Mode in Lower 64KB.......................................................................................... 127
12
List of Figures SLAU144J–December 2004–Revised July 2013
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