Datasheet

Item n-1

PC.19:16

PC.15:0

old

SR.11:0

Interrupts

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4.2 Interrupts

The MSP430X uses the same interrupt structure as the MSP430:

• Vectored interrupts with no polling necessary

• Interrupt vectors are located downward from address 0FFFEh

Interrupt operation for both MSP430 and MSP430X CPUs is described in Chapter 2 System Resets,

Interrupts, and Operating modes, Section 2 Interrupts. The interrupt vectors contain 16-bit addresses that

point into the lower 64-KB memory. This means all interrupt handlers must start in the lower 64-KB

memory, even in MSP430X devices.

During an interrupt, the program counter and the status register are pushed onto the stack as shown in

Figure 4-2. The MSP430X architecture efficiently stores the complete 20-bit PC value by automatically

appending the PC bits 19:16 to the stored SR value on the stack. When the RETI instruction is executed,

the full 20-bit PC is restored making return from interrupt to any address in the memory range possible.

Figure 4-2. PC Storage on the Stack for Interrupts

118

CPUX SLAU144J–December 2004–Revised July 2013

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