Datasheet

CPU Introduction

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4.1 CPU Introduction

The MSP430X CPU incorporates features specifically designed for modern programming techniques such

as calculated branching, table processing and the use of high-level languages such as C. The MSP430X

CPU can address a 1-MB address range without paging. In addition, the MSP430X CPU has fewer

interrupt overhead cycles and fewer instruction cycles in some cases than the MSP430 CPU, while

maintaining the same or better code density than the MSP430 CPU. The MSP430X CPU is backward

compatible with the MSP430 CPU.

The MSP430X CPU features include:

• RISC architecture

• Orthogonal architecture

• Full register access including program counter, status register and stack pointer

• Single-cycle register operations

• Large register file reduces fetches to memory

• 20-bit address bus allows direct access and branching throughout the entire memory range without

paging

• 16-bit data bus allows direct manipulation of word-wide arguments

• Constant generator provides the six most often used immediate values and reduces code size

• Direct memory-to-memory transfers without intermediate register holding

• Byte, word, and 20-bit address-word addressing

The block diagram of the MSP430X CPU is shown in Figure 4-1.

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CPUX SLAU144J–December 2004–Revised July 2013

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