Datasheet

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26.3.5 SD16AE, SD16_A Analog Input Enable Register ......................................................... 615

26.3.6 SD16IV, SD16_A Interrupt Vector Register ................................................................ 615

27 SD24_A ........................................................................................................................... 616

27.1 SD24_A Introduction ..................................................................................................... 617

27.2 SD24_A Operation ....................................................................................................... 619

27.2.1 ADC Core ....................................................................................................... 619

27.2.2 Analog Input Range and PGA ................................................................................ 619

27.2.3 Voltage Reference Generator ................................................................................ 619

27.2.4 Auto Power-Down .............................................................................................. 619

27.2.5 Analog Input Pair Selection ................................................................................... 619

27.2.6 Analog Input Characteristics .................................................................................. 620

27.2.7 Digital Filter ..................................................................................................... 621

27.2.8 Conversion Memory Register: SD24MEMx ................................................................ 625

27.2.9 Conversion Modes ............................................................................................. 626

27.2.10 Conversion Operation Using Preload ...................................................................... 628

27.2.11 Using the Integrated Temperature Sensor ................................................................ 629

27.2.12 Interrupt Handling ............................................................................................ 630

27.3 SD24_A Registers ....................................................................................................... 632

27.3.1 SD24CTL, SD24_A Control Register ........................................................................ 633

27.3.2 SD24CCTLx, SD24_A Channel x Control Register ....................................................... 634

27.3.3 SD24INCTLx, SD24_A Channel x Input Control Register ................................................ 635

27.3.4 SD24MEMx, SD24_A Channel x Conversion Memory Register ......................................... 636

27.3.5 SD24PREx, SD24_A Channel x Preload Register ........................................................ 636

27.3.6 SD24AE, SD24_A Analog Input Enable Register ......................................................... 636

27.3.7 SD24IV, SD24_A Interrupt Vector Register ................................................................ 637

28 Embedded Emulation Module (EEM) .................................................................................. 638

28.1 EEM Introduction ......................................................................................................... 639

28.2 EEM Building Blocks .................................................................................................... 641

28.2.1 Triggers ......................................................................................................... 641

28.2.2 Trigger Sequencer ............................................................................................. 641

28.2.3 State Storage (Internal Trace Buffer) ........................................................................ 641

28.2.4 Clock Control ................................................................................................... 641

28.3 EEM Configurations ..................................................................................................... 642

Revision History ....................................................................................................................... 643

SLAU144J–December 2004–Revised July 2013 Contents

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