Datasheet

Instruction Set
www.ti.com
3.4.6.45 SETZ
*SETZ Set zero bit
Syntax SETZ
Operation 1 Z
Emulation BIS #2,SR
Description The zero bit (Z) is set.
Status Bits N: Not affected
Z: Set
C: Not affected
V: Not affected
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
108
CPU SLAU144JDecember 2004Revised July 2013
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated