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23.2.5 Conversion Memory ........................................................................................... 565
23.2.6 ADC12 Conversion Modes ................................................................................... 565
23.2.7 Using the Integrated Temperature Sensor ................................................................. 570
23.2.8 ADC12 Grounding and Noise Considerations ............................................................. 571
23.2.9 ADC12 Interrupts .............................................................................................. 572
23.3 ADC12 Registers ......................................................................................................... 574
23.3.1 ADC12CTL0, ADC12 Control Register 0 ................................................................... 575
23.3.2 ADC12CTL1, ADC12 Control Register 1 ................................................................... 577
23.3.3 ADC12MEMx, ADC12 Conversion Memory Registers .................................................... 578
23.3.4 ADC12MCTLx, ADC12 Conversion Memory Control Registers ......................................... 578
23.3.5 ADC12IE, ADC12 Interrupt Enable Register ............................................................... 579
23.3.6 ADC12IFG, ADC12 Interrupt Flag Register ................................................................ 579
23.3.7 ADC12IV, ADC12 Interrupt Vector Register ................................................................ 580
24 TLV Structure .................................................................................................................. 581
24.1 TLV Introduction .......................................................................................................... 582
24.2 Supported Tags .......................................................................................................... 583
24.2.1 DCO Calibration TLV Structure .............................................................................. 583
24.2.2 TAG_ADC12_1 Calibration TLV Structure ................................................................. 584
24.3 Checking Integrity of SegmentA ....................................................................................... 586
24.4 Parsing TLV Structure of Segment A .................................................................................. 586
25 DAC12 ............................................................................................................................ 588
25.1 DAC12 Introduction ...................................................................................................... 589
25.2 DAC12 Operation ........................................................................................................ 591
25.2.1 DAC12 Core .................................................................................................... 591
25.2.2 DAC12 Reference ............................................................................................. 591
25.2.3 Updating the DAC12 Voltage Output ........................................................................ 591
25.2.4 DAC12_xDAT Data Format ................................................................................... 592
25.2.5 DAC12 Output Amplifier Offset Calibration ................................................................. 592
25.2.6 Grouping Multiple DAC12 Modules .......................................................................... 593
25.2.7 DAC12 Interrupts .............................................................................................. 594
25.3 DAC12 Registers ......................................................................................................... 595
25.3.1 DAC12_xCTL, DAC12 Control Register .................................................................... 596
25.3.2 DAC12_xDAT, DAC12 Data Register ....................................................................... 597
26 SD16_A ........................................................................................................................... 598
26.1 SD16_A Introduction ..................................................................................................... 599
26.2 SD16_A Operation ....................................................................................................... 601
26.2.1 ADC Core ....................................................................................................... 601
26.2.2 Analog Input Range and PGA ................................................................................ 601
26.2.3 Voltage Reference Generator ................................................................................ 601
26.2.4 Auto Power-Down .............................................................................................. 601
26.2.5 Analog Input Pair Selection ................................................................................... 601
26.2.6 Analog Input Characteristics .................................................................................. 602
26.2.7 Digital Filter ..................................................................................................... 603
26.2.8 Conversion Memory Register: SD16MEM0 ................................................................ 607
26.2.9 Conversion Modes ............................................................................................. 608
26.2.10 Using the Integrated Temperature Sensor ................................................................ 608
26.2.11 Interrupt Handling ............................................................................................ 609
26.3 SD16_A Registers ....................................................................................................... 611
26.3.1 SD16CTL, SD16_A Control Register ........................................................................ 612
26.3.2 SD16CCTL0, SD16_A Control Register 0 .................................................................. 613
26.3.3 SD16INCTL0, SD16_A Input Control Register ............................................................. 614
26.3.4 SD16MEM0, SD16_A Conversion Memory Register ..................................................... 615
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Contents SLAU144J–December 2004–Revised July 2013
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