Datasheet

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  
SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
75
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Port P1 (P1.7) pin schematics, MSP430x20x3
Bus
Keeper
EN
Direction
0: Input
1: Output
1
0
P1DIR.x
P1IN.x
P1IRQ.x
D
EN
Module X IN
1
0
Module X OUT
P1OUT.x
Interrupt
Edge
Select
Q
EN
Set
P1SEL.x
P1IES.x
P1IFG.x
P1.7/SDI/SDA/A3−/TDO/TDI
1
0
DVSS
DVCC
P1REN.x
SD16AE.x
Pad Logic
A3−
1
0
AV
SS
INCH=3
P1SEL.x
USIPE7
USI Module Direction
From JTAG
From JTAG (TDO)
USI Module Output
(I
2
C Mode
)
1
To JTAG
From JTAG
P1IE.x