Datasheet

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  
SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions, MSP430x20x1
TERMINAL
NAME
PW, or N RSA
I/O
DESCRIPTION
NAME
NO. NO.
I/O
DESCRIPTION
P1.0/TACLK/ACLK/CA0 2 1 I/O General-purpose digital I/O pin
Timer_A, clock signal TACLK input
ACLK signal ouput
Comparator_A+, CA0 input
P1.1/TA0/CA1 3 2 I/O General-purpose digital I/O pin
Timer_A, capture: CCI0A input, compare: Out0 output
Comparator_A+, CA1 input
P1.2/TA1/CA2 4 3 I/O General-purpose digital I/O pin
Timer_A, capture: CCI1A input, compare: Out1 output
Comparator_A+, CA2 input
P1.3/CAOUT/CA3 5 4 I/O General-purpose digital I/O pin
Comparator_A+, output / CA3 input
P1.4/SMCLK/C4/TCK 6 5 I/O General-purpose digital I/O pin
SMCLK signal output
Comparator_A+, CA4 input
JTAG test clock, input terminal for device programming and test
P1.5/TA0/CA5/TMS 7 6 I/O General-purpose digital I/O pin
Timer_A, compare: Out0 output
Comparator_A+, CA5 input
JTAG test mode select, input terminal for device programming and test
P1.6/TA1/CA6/TDI/TCLK 8 7 I/O General-purpose digital I/O pin
Timer_A, compare: Out1 output
Comparator_A+, CA6 input
JTAG test data input or test clock input during programming and test
P1.7/CAOUT/CA7/TDO/TDI
†
9 8 I/O General-purpose digital I/O pin
Comparator_A+, output / CA7 input
JTAG test data output terminal or test data input during programming and
test
XIN/P2.6/TA1 13 12 I/O Input terminal of crystal oscillator
General-purpose digital I/O pin
Timer_A, compare: Out1 output
XOUT/P2.7 12 11 I/O Output terminal of crystal oscillator
General-purpose digital I/O pin
RST/NMI/SBWTDIO 10 9 I Reset or nonmaskable interrupt input
Spy-Bi-Wire test data input/output during programming and test
TEST/SBWTCK 11 10 I Selects test mode for JTAG pins on Port1. The device protection fuse is
connected to TEST.
Spy-Bi-Wire test clock input during programming and test
V
CC
1 16 Supply voltage
V
SS
14 14 Ground reference
NC NA 13, 15 Not connected
QFN Pad NA Package
Pad
NA QFN package pad connection to V
SS
recommended.
†
TDO or TDI is selected via JTAG instruction.
NOTE: If XOUT/P2.7 is used as an input, excess current will flow until P2SEL.7 is cleared. This is due to the oscillator output driver connection
to this pad after reset.