Datasheet

  
  
SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
51
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Port P1 (P1.4 to P1.7) pin functions, MSP430x20x1
PIN NAME (P1.X)
X
FUNCTION
CONTROL BITS / SIGNALS
PIN NAME (P1.X)
X
FUNCTION
P1DIR.x P1SEL.x CAPD.x JTAG Mode
P1.4/SMCLK/CA4/
TCK
4
P1.4† Input/Output 0/1 0 0 0
P1.4/SMCLK/CA4/
TCK
4
N/A 0 1 0 0
SMCLK 1 1 0 0
CA4 (see Note 3) X X 1 0
TCK (see Note 4) X X X 1
P1.5/TA0/CA5/
TMS
5
P1.5† Input/Output 0/1 0 0 0
P1.5/TA0/CA5/
TMS
5
N/A 0 1 0 0
Timer_A2.TA0 1 1 0 0
CA5 (see Note 3) X X 1 0
TMS (see Note 4) X X X 1
P1.6/TA1/CA6/
TDI
6
P1.6† Input/Output 0/1 0 0 0
P1.6/TA1/CA6/
TDI
6
N/A 0 1 0 0
Timer_A2.TA1 1 1 0 0
CA6 (see Note 3) X X 1 0
TDI (see Note 4) X X X 1
P1.7/CAOUT/CA7/
TDO/TDI
7
P1.7† Input/Output 0/1 0 0 0
P1.7/CAOUT/CA7/
TDO/TDI
7
N/A 0 1 0 0
CAOUT 1 1 0 0
CA7 (see Note 3) X X 1 0
TDO/TDI (see Notes 4, 5) X X X 1
†
Default after reset (PUC/POR)
NOTES: 1. N/A: Not available or not applicable.
2. X: Don’t care.
3. Setting the CAPD.x bit disables the output driver as well as the input schmitt trigger to prevent parasitic cross currents when applying
analog signals. Selecting the CAx input pin to the comparator multiplexer with the P2CAx bits automatically disables the input buffer
for that pin, regardless of the state of the associated CAPD.x bit.
4. In JTAG mode the internal pull-up/down resistors are disabled.
5. Function controlled by JTAG