Datasheet

  
  
SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
39
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MSP430x20x2 electrical characteristics over recommended ranges of supply voltage and
operating free-air temperature (unless otherwise noted) (continued)
10-bit ADC, built-in voltage reference (MSP430x20x2 only)
PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT
Positive built-in reference analog
I
VREF+
≤ 1mA, REF2_5V=0 2.2 V
CC
V
CC,REF+
Positive built-in reference analog
supply voltage range
I
VREF+
≤ 0.5mA, REF2_5V=1 V
REF+
+0.15 V
CC
V
V
CC,REF+
supply voltage range
I
VREF+
≤ 1mA, REF2_5V=1 V
REF+
+0.15 V
CC
V
V
REF+
Positive built-in reference voltage
I
VREF+
≤ I
VREF+
max, REF2_5V=0 2.2 V/3 V 1.41 1.5 1.59 V
V
REF+
Positive built-in reference voltage
I
VREF+
≤ I
VREF+
max, REF2_5V=1
3 V 2.35 2.5 2.65 V
I
LD,VREF+
Maximum V
REF+
load current
2.2 V ±0.5
mA
I
LD,VREF+
Maximum V
REF+
load current
3 V ±1
mA
V
REF+
load regulation
I
VREF+
= 500 µA +/− 100 µA
Analog input voltage V
Ax
≈ 0.75 V;
REF2_5V=0
2.2 V/3 V ±2 LSB
V
REF+
load regulation
I
VREF+
= 500 µA ± 100 µA
Analog input voltage V
Ax
≈ 1.25 V;
REF2_5V=1
3 V ±2 LSB
V
REF+
load regulation response time
I
VREF+
=
100µA→900µA,
V
Ax
0.5 x V
REF+
ADC10SR=0 3 V 400
ns
V
REF+
load regulation response time
V
Ax
≈
0.5 x V
REF+
Error of conversion
result ≤ 1 LSB
ADC10SR=1 3V 2000
ns
C
VREF+
Max. capacitance at pin V
REF+
(see Note 1)
I
VREF+
≤±1mA,
REFON=1, REFOUT=1
2.2 V/3 V 100 pF
TC
REF+
Temperature coefficient
I
VREF+
= const. with
0 mA ≤ I
VREF+
≤ 1 mA
2.2 V/3 V ±100 ppm/°C
t
REFON
Settling time of internal reference
voltage (see Note 2)
I
VREF+
= 0.5 mA, REF2_5V=0
REFON = 0 → 1
3.6 V 30
t
REFBURST
Settling time of reference buffer
I
VREF+
= 0.5 mA,
REF2_5V=0,
ADC10SR=0 2.2 V 1
µs
t
REFBURST
Settling time of reference buffer
(see Note 2)
REF2_5V=0,
REFON = 1,
REFBURST = 1
ADC10SR=1 2.2 V 2.5
NOTES: 1. The capacitance applied to the internal buffer operational amplifier, if switched to terminal P2.4/TA2/A4/V
REF+
/V
eREF+
(REFOUT=1),
must be limited; the reference buffer may become unstable otherwise.
2. The condition is that the error in a conversion started after t
REFON
or t
RefBuf
is less than ±0.5 LSB.