Datasheet

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SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
crystal oscillator, LFXT1, low frequency modes (see Note 4)
PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT
f
LFXT1,LF
LFXT1 oscillator crystal
frequency, LF mode 0, 1
XTS = 0, LFXT1Sx = 0 or 1 1.8 V − 3.6 V 32,768 Hz
f
LFXT1,LF,logic
LFXT1 oscillator logic level
square wave input frequency,
LF mode
XTS = 0, LFXT1Sx = 3 1.8 V − 3.6 V 10,000 32,768 50,000 Hz
OA
LF
Oscillation Allowance for LF
XTS = 0, LFXT1Sx = 0;
f
LFXT1,LF
= 32,768 kHz,
C
L,eff
= 6 pF
500 kW
OA
LF
Oscillation Allowance for LF
crystals
XTS = 0, LFXT1Sx = 0;
f
LFXT1,LF
= 32,768 kHz,
C
L,eff
= 12 pF
200 kW
Integrated effective Load
XTS = 0, XCAPx = 0 1 pF
C
L,eff
Integrated effective Load
Capacitance, LF mode
XTS = 0, XCAPx = 1 5.5 pF
C
L,eff
Capacitance, LF mode
(see Note 1)
XTS = 0, XCAPx = 2 8.5 pF
(see Note 1)
XTS = 0, XCAPx = 3 11 pF
Duty Cycle LF mode
XTS = 0, Measured at
P1.4/ACLK, f
LFXT1,LF
= 32,768
Hz
2.2 V/3 V 30 50 70 %
f
Fault,LF
Osc. fault frequency threshold,
LF mode (see Note 3)
XTS = 0, LFXT1Sx = 3
(see Note 2)
2.2 V/3 V 10 10,000 Hz
NOTES: 1. Includes parasitic bond and package capacitance (approximately 2pF per pin).
Since the PCB adds additional capacitance it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup the effective load capacitance should always match the specification of the used crystal.
2. Measured with logic level input frequency but also applies to operation with crystals.
3. Frequencies below the MIN specification will set the fault flag, frequencies above the MAX specification will not set the fault flag.
Frequencies in between might set the flag.
4. To improve EMI on the LFXT1 oscillator the following guidelines should be observed.
− Keep as short of a trace as possible between the device and the crystal.
− Design a good ground plane around the oscillator pins.
− Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
− Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
− Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
− If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
− Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other
documentation. This signal is no longer required for the serial programming adapter.
internal very low power, low frequency oscillator (VLO)
PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT
f
VLO
VLO frequency 2.2 V/3 V 4 12 20 kHz
df
VLO
/dT VLO frequency temperature drift (see Note 1) 2.2 V/3 V 0.5 %/°C
df
VLO
/dV
CC
VLO frequency supply voltage
drift
T
A
= 25°C (see Note 2) 1.8V...3.6V 4 %/V
NOTES: 1. Calculated using the box method: (MAX(−40...85_C) − MIN(−40...85_C))/MIN(−40...85_C)/(85_C − (−40_C))
2. Calculated using the box method: (MAX(1.8...3.6V) − MIN(1.8...3.6V))/MIN(1.8...3.6V)/(3.6V − 1.8V)