Datasheet

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SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
outputs − Ports P1 and P2
PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT
I
(OHmax)
= −1.5 mA (see Notes 1) 2.2 V V
CC
−0.25 V
CC
V
OH
High-level output
I
(OHmax)
= −6 mA (see Notes 2) 2.2 V V
CC
−0.6 V
CC
V
V
OH
High-level output
voltage
I
(OHmax)
= −1.5 mA (see Notes 1)
3 V V
CC
−0.25 V
CC
V
voltage
I
(OHmax)
= −6 mA (see Notes 2) 3 V V
CC
−0.6 V
CC
I
(OLmax)
= 1.5 mA (see Notes 1) 2.2 V V
SS
V
SS
+0.25
V
OL
Low-level output
I
(OLmax)
= 6 mA (see Notes 2) 2.2 V V
SS
V
SS
+0.6
V
V
OL
Low-level output
voltage
I
(OLmax)
= 1.5 mA (see Notes 1)
3 V V
SS
V
SS
+0.25
V
I
(OLmax)
= 6 mA (see Notes 2) 3 V V
SS
V
SS
+0.6
NOTES: 1. The maximum total current, I
OHmax
and I
OLmax
, for all outputs combined, should not exceed ±12 mA to hold the maximum
voltage drop specified.
2. The maximum total current, I
OHmax
and I
OLmax
, for all outputs combined, should not exceed ±48 mA to hold the maximum
voltage drop specified.
output frequency − Ports P1 and P2
PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT
f
Px.y
Port output frequency
P1.4/SMCLK, C
L
= 20 pF, R
L
= 1 kOhm
2.2 V 10 MHz
f
Px.y
Port output frequency
(with load)
P1.4/SMCLK, C
L
= 20 pF, R
L
= 1 kOhm
(see Note 1 and 2)
3 V 12 MHz
f
Port_CLK
Clock output frequency
P2.0/ACLK, P1.4/SMCLK, C
L
= 20 pF
2.2 V 12 MHz
f
Port_CLK
Clock output frequency
P2.0/ACLK, P1.4/SMCLK, C
L
= 20 pF
(see Note 2)
3 V 16 MHz
NOTES: 1. A resistive divider with 2 times 0.5 kW between V
CC
and V
SS
is used as load. The output is connected to the center tap of the divider.
2. The output voltage reaches at least 10% and 90% V
CC
at the specified toggle frequency.