Datasheet

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SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timer_A2
Timer_A2 is a 16-bit timer/counter with two capture/compare registers. Timer_A2 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_A2 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Timer_A2 Signal Connections (MSP43020x1 only)
Input
Pin Number
Device
Input Signal
Module
Input Name
Module
Block
Module
Output Signal
Output
Pin Number
PW, N RSA PW, N RSA
2 - P1.0 1 - P1.0 TACLK TACLK
ACLK ACLK
Timer
NA
SMCLK SMCLK
Timer NA
2 - P1.0 1 - P1.0 TACLK INCLK
3 - P1.1 2 - P1.1 TA0 CCI0A
3 - P1.1 2 - P1.1
ACLK (internal) CCI0B
CCR0
TA0
7 - P1.5 6 - P1.5
V
SS
GND
CCR0 TA0
V
CC
V
CC
4 - P1.2 3 - P1.2 TA1 CCI1A
4 - P1.2 3 - P1.2
CAOUT (internal) CCI1B
CCR1
TA1
8 - P1.6 7 - P1.6
V
SS
GND
CCR1 TA1
13 - P2.6 12 - P2.6
V
CC
V
CC
Timer_A2 Signal Connections (MSP430F20x2, MSP430F20x3)
Input
Pin Number
Device
Input Signal
Module
Input Name
Module
Block
Module
Output Signal
Output
Pin Number
PW, N RSA PW, N RSA
2 - P1.0 1 - P1.0 TACLK TACLK
ACLK ACLK
Timer
NA
SMCLK SMCLK
Timer NA
2 - P1.0 1 - P1.0 TACLK INCLK
3 - P1.1 2 - P1.1 TA0 CCI0A
3 - P1.1 2 - P1.1
7 - P1.5 6 - P1.5 ACLK (internal) CCI0B
CCR0
TA0
7 - P1.5 6 - P1.5
V
SS
GND
CCR0 TA0
V
CC
V
CC
4 - P1.2 3 - P1.2 TA1 CCI1A
4 - P1.2 3 - P1.2
8 - P1.6 7 - P1.6 TA1 CCI1B
CCR1
TA1
8 - P1.6 7 - P1.6
V
SS
GND
CCR1 TA1
13 - P2.6 12 - P2.6
V
CC
V
CC
comparator_A+ (MSP430x20x1 only)
The primary function of the comparator_A+ module is to support precision slope analog-to-digital conversions,
battery-voltage supervision, and monitoring of external analog signals.