Datasheet

  
  
SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
16
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
peripherals
Peripherals are connected to the CPU through data, address, and control busses and can be handled using
all instructions. For complete module descriptions, refer to the MSP430x2xx Family User’s Guide.
oscillator and system clock
The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal
oscillator, an internal very low power, low frequency oscillator and an internal digitally-controlled oscillator
(DCO). The basic clock module is designed to meet the requirements of both low system cost and low-power
consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 1 µs. The basic
clock module provides the following clock signals:
D Auxiliary clock (ACLK), sourced either from a 32768-Hz watch crystal or the internal LF oscillator.
D Main clock (MCLK), the system clock used by the CPU.
D Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
DCO Calibration Data (provided from factory in flash info memory segment A)
DCO Frequency Calibration Register Size Address
1 MHz
CALBC1_1MHz byte
010FFh
1 MHz
CALDCO_1MHz byte
010FEh
8 MHz
CALBC1_8MHz byte
010FDh
8 MHz
CALDCO_8MHz byte
010FCh
12 MHz
CALBC1_12MHz byte
010FBh
12 MHz
CALDCO_12MHz byte
010FAh
16 MHz
CALBC1_16MHz byte
010F9h
16 MHz
CALDCO_16MHz byte
010F8h
brownout
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on
and power off.
digital I/O
There is one 8-bit I/O port implemented—port P1—and two bits of I/O port P2:
D All individual I/O bits are independently programmable.
D Any combination of input, output, and interrupt condition is possible.
D Edge-selectable interrupt input capability for all the eight bits of port P1 and the two bits of port P2.
D Read/write access to port-control registers is supported by all instructions.
D Each I/O has an individually programmable pull-up/pull-down resistor.
WDT+ watchdog timer
The primary function of the watchdog timer (WDT+) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be disabled or configured as an interval timer and can
generate interrupts at selected time intervals.