Datasheet

  
  
SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
memory organization
MSP430F200x MSP430F201x
Memory
Main: interrupt vector
Main: code memory
Size
Flash
Flash
1KB Flash
0FFFFh−0FFC0h
0FFFFh−0FC00h
2KB Flash
0FFFFh−0FFC0h
0FFFFh−0F800h
Information memory Size
Flash
256 Byte
010FFh − 01000h
256 Byte
010FFh − 01000h
RAM Size 128 Byte
027Fh − 0200h
128 Byte
027Fh − 0200h
Peripherals 16-bit
8-bit
8-bit SFR
01FFh − 0100h
0FFh − 010h
0Fh − 00h
01FFh − 0100h
0FFh − 010h
0Fh − 00h
flash memory
The flash memory can be programmed via the Spy-Bi-Wire/JTAG port, or in-system by the CPU. The CPU can
perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
D Flash memory has n segments of main memory and four segments of information memory (A to D) of 64
bytes each. Each segment in main memory is 512 bytes in size.
D Segments 0 to n may be erased in one step, or each segment may be individually erased.
D Segments A to D can be erased individually, or as a group with segments 0−n.
Segments A to D are also called information memory.
D Segment A contains calibration data. After reset segment A is protected against programming and erasing.
It can be unlocked but care should be taken not to erase this segment if the device-specific calibration data
is required.