Datasheet

MSP430x12x
MIXED SIGNAL MICROCONTROLLER
SLAS312C − JULY 2001 − REVISED SEPTEMBER 2004
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
pin designation, MSP430x12x
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TEST
V
CC
P2.5/R
OSC
V
SS
XOUT
XIN
RST/NMI
P2.0/ACLK
P2.1/INCLK
P2.2/CAOUT/TA0
P3.0/STE0
P3.1/SIMO0
P3.2/SOMI0
P3.3/UCLK0
P1.7/TA2/TDO/TDI
P1.6/TA1/TDI/TCLK
P1.5/TA0/TMS
P1.4/SMCLK/TCK
P1.3/TA2
P1.2/TA1
P1.1/TA0
P1.0/TACLK
P2.4/CA1/TA2
P2.3/CA0/TA1
P3.7
P3.6
P3.5/URXD0
P3.4/UTXD0
DW OR PW PACKAGE
(TOP VIEW)
RHB PACKAGE
(TOP VIEW)
XIN
P2.5/R
OSC
NC
NC
RST/NMI
V
CC
P2.0/ACLK
TEST
P2.1/INCLK
P1.7/TA2/TDO/TDI
XOUT
P1.6/TA1/TDI/TCLK
P1.1/TA0
P1.0/TACLK
NC
P2.4/CA1/TA2
P2.3/CA0/TA1
P1.2/TA1
1
10 11 12 13
272829
P3.0/STE0
P3.1/SIMO0 P3.2/SOMI0
P3.3/UCLK0
P3.4/UTXD0
P3.5/URXD0
P3.6
P1.5/TA0/TMS
2
5
7
6
3
4
14
3031
V
SS
P1.3/TA2
8
24
23
20
18
19
22
21
17
26
15
P2.2/CAOUT/TA0
NC
P3.7
P1.4/SMCLK/TCK
Note: NC pins not internally connected
Power Pad connection to V
SS
recommended
functional block diagram
Oscillator
ACLK
SMCLK
CPU
Incl. 16 Reg.
Bus
Conv
MCB
XIN XOUT P3P2
MDB, 16 Bit
MAB, 16 Bit
MCLK
MAB,
4 Bit
V
CC
V
SS
RST/NMI
System
Clock
R
OSC
P1
8KB Flash
4KB Flash
256B RAM
Watchdog
Timer
15/16-Bit
Timer_A3
3 CC Reg
I/O Port 1
8 I/Os, with
Interrupt
Capability
I/O Port 2
6 I/Os, with
Interrupt
Capability
POR USART0
UART Mode
SPI Mode
I/O Port 3
8 I/Os
MDB, 16-Bit
MAB, 16-Bit
JTAG
TEST
Test
JTAG
Emulation
Module
8 6 8
Comparator
A
MDB, 8 Bit