Datasheet

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SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
10-bit ADC, power supply and input range conditions (see Note 1)
PARAMETER TEST CONDITIONS MIN NOM MAX UNIT
V
CC
Analog supply voltage V
SS
= 0 V 2.2 3.6 V
V
(P6.x/Ax)
Analog input voltage
range (see Note 2)
All Ax terminals. Analog inputs
selected in ADC10AE register and PxSel.x=1
V
SS
≤ V
Px.x/Ax
≤ V
CC
0 V
CC
V
Operating supply current
f
ADC10CLK
= 5.0 MHz
ADC10ON = 1, REFON = 0
V
CC
= 2.2 V 0.52 1.05
I
ADC10
into V
CC
terminal
(see Note 3)
ADC10ON = 1, REFON = 0
ADC10SHT0=1, ADC10SHT1=0,
ADC10DIV=0
V
CC
= 3 V 0.6 1.2
mA
I
REF+
Reference operating
supply current,
reference buffer disabled
(see Note 4)
f
ADC10CLK
= 5.0 MHz
ADC10ON = 0,
REFON = 1, REF2_5V = x;
REFOUT = 0
V
CC
=
2.2V/3 V
0.25 0.4 mA
Reference buffer
f
ADC10CLK
= 5.0 MHz
ADC10ON = 0,
ADC10SR = 0 1.1 1.4
I
REFB
operating supply current
(see Note 4)
ADC10ON = 0,
REFON = 1, REF2_5V = 0
REFOUT = 1
ADC10SR = 1 0.46 0.55
mA
C
I
†
Input capacitance
Only one terminal can be selected
at one time, Px.x/Ax
V
CC
= 2.2 V 27 pF
R
I
†
Input MUX ON resistance 0V ≤ V
Ax
≤ V
CC
V
CC
= 3 V 2000 Ω
†
Not production tested, limits verified by design
NOTES: 1. The leakage current is defined in the leakage current table with Px.x/Ax parameter.
2. The analog input voltage range must be within the selected reference voltage range V
R+
to V
R−
for valid conversion results.
3. The internal reference supply current is not included in current consumption parameter I
ADC10
.
4. The internal reference current is supplied via terminal V
CC
. Consumption is independent of the ADC10ON control bit, unless a
conversion is active. The REFON bit enables the built-in reference to settle before starting an A/D conversion.
10-bit ADC, external reference (see Note 1)
PARAMETER TEST CONDITIONS V
CC
MIN NOM MAX UNIT
V
eREF+
Positive external
reference voltage input
V
eREF+
> V
REF−
/V
eREF−
(see Note 2) 1.4 V
CC
V
V
REF− /
V
eREF−
Negative external
reference voltage input
V
eREF+
> V
REF−
/V
eREF−
(see Note 3) 0 1.2 V
(V
eREF+
−
V
REF−/
V
eREF−
)
Differential external
reference voltage input
V
eREF+
> V
REF−
/V
eREF−
(see Note 4) 1.4 V
CC
V
I
VeREF+
Static input current 0V ≤V
eREF+
≤ V
CC
2.2 V/3 V ±1 µA
I
VREF−/VeREF−
Static input current 0V ≤ V
eREF−
≤ V
CC
2.2 V/3 V ±1 µA
NOTES: 1. The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, C
I
, is also
the dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the
recommendations on analog-source impedance to allow the charge to settle for 10-bit accuracy.
2. The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced
accuracy requirements.
3. The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced
accuracy requirements.
4. The accuracy limits minimum external differential reference voltage. Lower differential reference voltage levels may be applied with
reduced accuracy requirements.