Datasheet
SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
flash memory
The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The
CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
D Flash memory has n segments of main memory and two segments of information memory (A and B) of 128
bytes each. Each segment in main memory is 512 bytes in size.
D Segments 0 to n may be erased in one step, or each segment may be individually erased.
D Segments A and B can be erased individually, or as a group with segments 0−n.
Segments A and B are also called information memory.
D New devices may have some bytes programmed in the information memory (needed for test during
manufacturing). The user should perform an erase of the information memory prior to the first use.
Segment0 w/
Interrupt Vectors
0FFFFh
0FE00h
Information Memory
Flash Main Memory
Segment1
Segment2
Segment3
Segment4
Segment14
Segment15
SegmentA
SegmentB
0FDFFh
0FC00h
0FBFFh
0FA00h
0F9FFh
0F800h
0F7FFh
0F600h
0E3FFh
0E200h
0E1FFh
0E000h
010FFh
01080h
0107Fh
01000h
NOTE: All segments not implemented on all devices.