Datasheet

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SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
special function registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
that are not allocated to a functional purpose are not physically present in the device. Simple software access
is provided with this arrangement.
interrupt enable 1 and 2
7654 0
OFIE WDTIE
321
rw-0 rw-0 rw-0
Address
0h
NMIIEACCVIE
rw-0
WDTIE: Watchdog Timer interrupt enable. Inactive if watchdog mode is selected. Active if Watchdog Timer
is configured in interval timer mode.
OFIE: Oscillator fault enable
NMIIE: (Non)maskable interrupt enable
ACCVIE: Flash access violation interrupt enable
7654 0321
Address
01h
UTXIE0 URXIE0
rw-0
rw-0
URXIE0: USART0: UART and SPI receive-interrupt enable (MSP430x12x2 devices only)
UTXIE0: USART0: UART and SPI transmit-interrupt enable (MSP430x12x2 devices only)
interrupt flag register 1 and 2
7654 0
OFIFG WDTIFG
321
rw-0 rw-1 rw-(0)
Address
02h NMIIFG
WDTIFG: Set on Watchdog Timer overflow (in watchdog mode) or security key violation.
Reset on V
CC
power-up or a reset condition at RST/NMI pin in reset mode.
OFIFG: Flag set on oscillator fault
NMIIFG: Set via RST
/NMI-pin
7654 0321
Address
03h
UTXIFG0 URXIFG0
rw-0
rw-1
URXIFG0: USART0: UART and SPI receive flag (MSP430x12x2 devices only)
UTXIFG0: USART0: UART and SPI transmit flag (MSP430x12x2 devices only)