Datasheet

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SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram, MSP430x11x2
Oscillator
ACLK
SMCLK
CPU
Incl. 16 Reg.
Bus
Conv
MCB
XIN XOUT P2
MDB, 16 Bit
MAB, 16 Bit
MCLK
MAB,
4 Bit
V
CC
V
SS
RST/NMI
System
Clock
R
OSC
P1/JTAG
8KB Flash
4KB Flash
256B RAM
256B RAM
ADC10
10-Bit
Autoscan
DTC
Watchdog
Timer
15/16-Bit
Timer_A3
3 CC Reg
I/O Port 1
8 I/Os, with
Interrupt
Capability
I/O Port 2
6 I/Os, with
Interrupt
Capability
POR/
Brownout
MDB, 8 Bit
MDB, 16-Bit
MAB, 16-Bit
TEST
Test
JTAG
Emulation
Module
8 6
functional block diagram, MSP430x12x2
Oscillator
ACLK
SMCLK
CPU
Incl. 16 Reg.
Bus
Conv
MCB
XIN XOUT P3P2
MDB, 16 Bit
MAB, 16 Bit
MCLK
MAB,
4 Bit
V
CC
V
SS
RST/NMI
System
Clock
R
OSC
P1/JTAG
8KB Flash
4KB Flash
256B RAM
256B RAM
ADC10
10-Bit
Autoscan
DTC
Watchdog
Timer
15/16-Bit
Timer_A3
3 CC Reg
I/O Port 1
8 I/Os, with
Interrupt
Capability
I/O Port 2
6 I/Os, with
Interrupt
Capability
POR/
Brownout
USART0
UART Mode
SPI Mode
I/O Port 3
8 I/Os
MDB, 8 Bit
MDB, 16-Bit
MAB, 16-Bit
TEST
Test
JTAG
Emulation
Module
8 6 8