Datasheet

 
  
SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
input/output schematic (continued)
Port P2, P2.0 to P2.2, input/output with Schmitt-trigger
P2OUT.
x
Module X Out
P2DIR.x
Direction Control
From Module
P2SEL.x
D
EN
Interrupt
Edge
Select
P2IES.x P2SEL.x
P2IE.x
P2IFG.x
P2IRQ.x
EN
Set
Q
0
1
1
0
to ADC10,
P2.0/ACLK/A0
P2.1/INCLK/A1
P2.2/TA0/A2
Module X In
P2IN.x
a0, or a1, or a2
selected in
ADC10
Pad Logic
0: input
1: output
Bus
Keeper
ADC10AE.x
NOTE: 0≤ x ≤ 2
a0, or a1, or a2
PnSel.x
PnDIR.x
DIRECTION
CONTROL
FROM MODULE
PnOUT.x MODULE X OUT PnIN.x MODULE X IN PnIE.x PnIFG.x PnIES.x
P2Sel.0 P2DIR.0 P2DIR.0 P2OUT.0 ACLK
†
P2IN.0 unused P2IE.0 P2IFG.0 P1IES.0
P2Sel.1 P2DIR.1 P2DIR.1 P2OUT.1 V
SS
P2IN.1 INCLK
†
P2IE.1 P2IFG.1 P1IES.1
P2Sel.2 P2DIR.2 P2DIR.2 P2OUT.2 OUT0 signal
†
P2IN.2 CCI0B
†
P2IE.2 P2IFG.2 P1IES.2
†
Timer_A