Datasheet

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SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
outputs Port 1 to Port 3; P1.0 to P1.7, P2.0 to P2.5, P3.0 to P3.7
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
(OHmax)
= −1.5 mA See Note 1 V
CC
−0.25 V
CC
I
(OHmax)
= −6 mA
V
CC
= 2.2 V
See Note 2 V
CC
−0.6 V
CC
V
OH
High-level output voltage
I
(OHmax)
= −1.5 mA See Note 1 V
CC
−0.25 V
CC
V
I
(OHmax)
= −6 mA
V
CC
= 3 V
See Note 2 V
CC
−0.6 V
CC
I
(OLmax)
= 1.5 mA See Note 1 V
SS
V
SS
+0.25
I
(OLmax)
= 6 mA
V
CC
= 2.2 V
See Note 2 V
SS
V
SS
+0.6
V
OL
Low-level output voltage
I
(OLmax)
= 1.5 mA See Note 1 V
SS
V
SS
+0.25
V
I
(OLmax)
= 6 mA
V
CC
= 3 V
See Note 2 V
SS
V
SS
+0.6
NOTES: 1. The maximum total current, I
OHmax
and I
OLmax
, for all outputs combined, should not exceed ±12 mA to hold the maximum voltage
drop specified.
2. The maximum total current, I
OHmax
and I
OLmax
, for all outputs combined, should not exceed ±48 mA to hold the maximum voltage
drop specified.
outputs P1.x, P2.x, P3.x, TAx
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
f
(P20)
P2.0/ACLK, C
L
= 20 pF 2.2 V/3 V f
System
f
(TAx)
Output frequency
TA0, TA1, TA2, C
L
= 20 pF,
Internal clock source, SMCLK signal applied (see Note 1)
2.2 V/3 V dc f
System
MHz
f
SMCLK
= f
LFXT1
= f
XT1
40% 60%
f
SMCLK
= f
LFXT1
= f
LF
35% 65%
P1.4/SMCLK,
C
L
= 20 pF
f
SMCLK
= f
LFXT1/n
2.2 V/3 V
50%−
15 ns
50%
50%+
15 ns
t
(Xdc)
Duty cycle of O/P
frequency
f
SMCLK
= f
DCOCLK
2.2 V/3 V
50%−
15 ns
50%
50%+
15 ns
frequency
f
P20
= f
LFXT1
= f
XT1
40% 60%
P2.0/ACLK,
f
P20
= f
LFXT1
= f
LF
2.2 V/3 V
30% 70%
C
L
= 20 pF
f
P20
= f
LFXT1/n
50%
t
(TAdc)
TA0, TA1, TA2, C
L
= 20 pF, Duty cycle = 50% 2.2 V/3 V 0 ±50 ns
NOTES: 1. The limits of the system clock MCLK has to be met. MCLK and SMCLK can have different frequencies.