Datasheet

MSP430AFE2x3

MSP430AFE2x2

MSP430AFE2x1

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SLAS701A –NOVEMBER 2010–REVISED MARCH 2011

Table 10. Module Enable Register 1

Address 7 6 5 4 3 2 1 0

04h UTXE0 URXE0

USPIE0

rw-0 rw-0

URXE0 USART0: UART mode receive enable

UTXE0 USART0: UART mode transmit enable

USPIE0 USART0: SPI mode transmit and receive enable

Table 11. Module Enable Register 2

Address 7 6 5 4 3 2 1 0

05h

Memory Organization

Table 12. Memory Organization

MSP430AFE22x MSP430AFE23x MSP430AFE25x

Memory Size 4 KB 8 KB 16 KB

Main: interrupt vector Flash 0xFFFF to 0xFFE0 0xFFFF to 0xFFE0 0xFFFF to 0xFFE0

Main: code memory Flash 0xFFFF to 0xF000 0xFFFF to 0xE000 0xFFFF to 0xC000

Size 256 Byte 256 Byte 256 Byte

Information memory

Flash 0x10FFh to 0x1000 0x10FFh to 0x1000 0x10FFh to 0x1000

256 Byte 512 Byte 512 Byte

RAM Size

0x02FF to 0x0200 0x03FF to 0x0200 0x03FF to 0x0200

16-bit 0x01FF to 0x0100 0x01FF to 0x0100 0x01FF to 0x0100

Peripherals 8-bit 0x00FF to 0x0010 0x00FF to 0x0010 0x00FF to 0x0010

8-bit SFR 0x000F to 0x0000 0x000F to 0x0000 0x000F to 0x0000

Flash Memory

The flash memory can be programmed via the Spy-Bi-Wire/JTAG port or in-system by the CPU. The CPU can

perform single-byte and single-word writes to the flash memory. Features of the flash memory include:

• Flash memory has n segments of main memory and four segments of information memory (A to D) of

64 bytes each. Each segment in main memory is 512 bytes in size.

• Segments 0 to n may be erased in one step, or each segment may be individually erased.

• Segments A to D can be erased individually, or as a group with segments 0 to n.

Segments A to D are also called information memory.

• Segment A contains calibration data. After reset segment A is protected against programming and erasing. It

can be unlocked but care should be taken not to erase this segment if the device-specific calibration data is

required.