Datasheet

MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
www.ti.com SLAS718D –NOVEMBER 2012–REVISED OCTOBER 2013
Table 57. MSP430F522x Device Descriptor Table
(1)
(continued)
F5229 F5227 F5224 F5222
Size
Description Address
(bytes)
Value Value Value Value
22h 22h 22h 22h
Memory 4 2
96h 94h 96h 94h
Memory 5 2 N/A N/A N/A N/A
Memory 6 1/2 N/A N/A N/A N/A
delimiter 1 00h 00h 00h 00h
Peripheral count 1 20h 20h 1Fh 1Fh
00h 00h 00h 00h
MSP430CPUXV2 2
23h 23h 23h 23h
00h 00h 00h 00h
JTAG 2
09h 09h 09h 09h
00h 00h 00h 00h
SBW 2
0Fh 0Fh 0Fh 0Fh
00h 00h 00h 00h
EEM-S 2
03h 03h 03h 05h
00h 00h 00h 00h
TI BSL 2
FCh FCh FCh FCh
10h 10h 10h 10h
SFR 2
41h 41h 41h 41h
02h 02h 02h 02h
PMM 2
30h 30h 30h 30h
02h 02h 02h 02h
FCTL 2
38h 38h 38h 38h
01h 01h 01h 01h
CRC16 2
3Ch 3Ch 3Ch 3Ch
00h 00h 00h 00h
CRC16_RB 2
3Dh 3Dh 3Dh 3Dh
00h 00h 00h 00h
RAMCTL 2
44h 44h 44h 44h
00h 00h 00h 00h
WDT_A 2
40h 40h 40h 40h
01h 01h 01h 01h
UCS 2
48h 48h 48h 48h
02h 02h 02h 02h
SYS 2
42h 42h 42h 42h
03h 03h 03h 03h
REF 2
A0h A0h A0h A0h
01h 01h 01h 01h
Port Mapping 2
10h 10h 10h 10h
04h 04h 04h 04h
Port 1/2 2
51h 51h 51h 51h
02h 02h 02h 02h
Port 3/4 2
52h 52h 52h 52h
02h 02h 02h 02h
Port 5/6 2
53h 53h 53h 53h
02h 02h
Port 7/8 2 N/A N/A
54h 54h
0Ch 0Ch 0Eh 0Eh
JTAG 2
5Fh 5Fh 5Fh 5Fh
02h 02h 02h 02h
TA0 2
62h 62h 62h 62h
04h 04h 04h 04h
TA1 2
61h 61h 61h 61h
04h 04h 04h 04h
TB0 2
67h 67h 67h 67h
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