Datasheet
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
FromJTAG
1
0
PJDIR.x
PJIN.x
EN
1
0
FromJTAG
PJOUT.x
1
0
DV
SS
DV
CC
PJREN.x
PadLogic
1
PJDS.x
0:Lowdrive
1:Highdrive
D
DVSS
ToJTAG
PJ.0/TDO
FromJTAG
1
0
PJDIR.0
PJIN.0
EN
1
0
FromJTAG
PJOUT.0
1
0
DV
SS
DV
CC
PJREN.0
PadLogic
1
PJDS.0
0:Lowdrive
1:Highdrive
D
DVCC
MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
SLAS718D –NOVEMBER 2012–REVISED OCTOBER 2013
www.ti.com
Port J, J.0 JTAG pin TDO, Input/Output With Schmitt Trigger or Output
Port J, J.1 to J.3 JTAG pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
94 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: MSP430F5229 MSP430F5227 MSP430F5224 MSP430F5222 MSP430F5219 MSP430F5217
MSP430F5214 MSP430F5212