Datasheet

P4.0/P4MAP0
P4.1/P4MAP1
P4.2/P4MAP2
P4.3/P4MAP3
P4.4/P4MAP4
P4.5/P4MAP5
P4.6/P4MAP6
P4.7/P4MAP7
Direction
0:Input
1:Output
P4SEL.x
1
0
P4DIR.x
P4IN.x
EN
toPortMappingControl
1
0
fromPortMappingControl
P4OUT.x
1
0
DV
SS
DV
IO
P4REN.x
PadLogic
1
P4DS.x
0:Lowdrive
1:Highdrive
D
fromPortMappingControl
MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
www.ti.com SLAS718D –NOVEMBER 2012–REVISED OCTOBER 2013
Port P4, P4.0 to P4.7, Input/Output With Schmitt Trigger
Table 50. Port P4 (P4.0 to P4.7) Pin Functions
CONTROL BITS AND SIGNALS
(1)
PIN NAME (P4.x) x FUNCTION
P4DIR.x
(2)
P4SEL.x P4MAPx
P4.0/P4MAP0 0 P4.0 (I/O) I: 0; O: 1 0 X
Mapped secondary digital function X 1 ≤ 30
P4.1/P4MAP1 1 P4.1 (I/O) I: 0; O: 1 0 X
Mapped secondary digital function X 1 ≤ 30
P4.2/P4MAP2 2 P4.2 (I/O) I: 0; O: 1 0 X
Mapped secondary digital function X 1 ≤ 30
P4.3/P4MAP3 3 P4.3 (I/O) I: 0; O: 1 0 X
Mapped secondary digital function X 1 ≤ 30
P4.4/P4MAP4 4 P4.4 (I/O) I: 0; O: 1 0 X
Mapped secondary digital function X 1 ≤ 30
P4.5/P4MAP5 5 P4.5 (I/O) I: 0; O: 1 0 X
Mapped secondary digital function X 1 ≤ 30
P4.6/P4MAP6 6 P4.6 (I/O) I: 0; O: 1 0 X
Mapped secondary digital function X 1 ≤ 30
P4.7/P4MAP7
(3)
7 P4.7 (I/O) I: 0; O: 1 0 X
Mapped secondary digital function X 1 ≤ 30
(1) X = Don't care
(2) The direction of some mapped secondary functions are controlled directly by the module. See Table 10 for specific direction control
information of mapped secondary functions.
(3) Not available on RGZ package types.
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