Datasheet

MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
SLAS718D –NOVEMBER 2012–REVISED OCTOBER 2013 www.ti.com
10-Bit ADC, Power Supply and Input Range Conditions
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
AV
CC
and DV
CC
are connected together,
AV
CC
Analog supply voltage AV
SS
and DV
SS
are connected together, 1.8 3.6 V
V
(AVSS)
= V
(DVSS)
= 0 V
All ADC10_A pins: P1.0 to P1.5 and P3.6 and
V
(Ax)
Analog input voltage range
(2)
0 AV
CC
V
P3.7 terminals
Operating supply current into f
ADC10CLK
= 5.0 MHz, ADC10ON = 1, 2.2 V 60 100
AVCC terminal, REF module REFON = 0, SHT0 = 0, SHT1 = 0, µA
3 V 75 110
and reference buffer off ADC10DIV = 0, ADC10SREF = 00
Operating supply current into f
ADC10CLK
= 5.0 MHz, ADC10ON = 1,
AVCC terminal, REF module REFON = 1, SHT0 = 0, SHT1 = 0, 3 V 113 150 µA
on, reference buffer on ADC10DIV = 0, ADC10SREF = 01
f
ADC10CLK
= 5.0 MHz, ADC10ON = 1,
I
ADC10_A
Operating supply current into
REFON = 0, SHT0 = 0, SHT1 = 0,
AVCC terminal, REF module 3 V 105 140 µA
ADC10DIV = 0, ADC10SREF = 10,
off, reference buffer on
VEREF = 2.5 V
f
ADC10CLK
= 5.0 MHz, ADC10ON = 1,
Operating supply current into
REFON = 0, SHT0 = 0, SHT1 = 0,
AVCC terminal, REF module 3 V 70 110 µA
ADC10DIV = 0, ADC10SREF = 11,
off, reference buffer off
VEREF = 2.5 V
Only one terminal Ax can be selected at one
C
I
Input capacitance time from the pad to the ADC10_A capacitor 2.2 V 3.5 pF
array including wiring and pad
AV
CC
> 2 V, 0 V ≤ V
Ax
≤ AV
CC
36
R
I
Input MUX ON resistance kΩ
1.8 V < AV
CC
< 2 V, 0 V ≤ V
Ax
≤ AV
CC
96
(1) The leakage current is defined in the leakage current table with P6.x/Ax parameter.
(2) The analog input voltage range must be within the selected reference voltage range V
R+
to V
R–
for valid conversion results. The external
reference voltage requires decoupling capacitors. See
()
.
10-Bit ADC, Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP MAX UNIT
For specified performance of ADC10_A linearity
f
ADC10CLK
Input clock frequency 2.2 V, 3 V 0.45 5 5.5 MHz
parameters
Internal ADC10_A
f
ADC10OSC
ADC10DIV = 0, f
ADC10CLK
= f
ADC10OSC
2.2 V, 3 V 4.2 4.8 5.4 MHz
oscillator
(1)
REFON = 0, Internal oscillator, 12 ADC10CLK
cycles, 10-bit mode 2.2 V, 3 V 2.4 3.0
f
ADC10OSC
= 4 MHz to 5 MHz
t
CONVERT
Conversion time µs
External f
ADC10CLK
from ACLK, MCLK or SMCLK,
(2)
ADC10SSEL ≠ 0
Turn on settling time of
t
ADC10ON
See
(3)
100 ns
the ADC
1.8 V 3 µs
t
Sample
Sampling time R
S
= 1000 Ω, R
I
= 96 k Ω, C
I
= 3.5 pF
(4)
3.0 V 1 µs
(1) The ADC10OSC is sourced directly from MODOSC inside the UCS.
(2) 12 × ADC10DIV × 1/f
ADC10CLK
(3) The condition is that the error in a conversion started after t
ADC10ON
is less than ± 0.5 LSB. The reference and input signal are already
settled.
(4) Approximately eight Tau (τ) are needed to get an error of less than ±0.5 LSB
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