Datasheet
V
CC
V
IO
V
CC
≤ V
while V < V
IO
IO IO,min
V
SS
t
V
IO
≤ V
CC
V
IO,min
V
CC
≤ V
while V < V
IO
IO IO,min
MSP430F5229, MSP430F5227, MSP430F5224, MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
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SLAS718D –NOVEMBER 2012–REVISED OCTOBER 2013
NOTE: The device supports continuous operation with V
CC
= V
SS
while V
IO
is fully within its specification. During this time, the
general-purpose I/Os that reside on the V
IO
supply domain are configured as inputs and pulled down to V
SS
through
their internal pulldown resistors. RST/NMI is high impedance. BSLEN is configured as an input and is pulled down to
V
SS
through its internal pulldown resistor. When V
CC
reaches above the BOR threshold, the general-purpose I/Os
become high-impedance inputs (no pullup or pulldown enabled), RST/NMI becomes an input pulled up to V
IO
through
its internal pullup resistor, and BSLEN remains pulled down to V
SS
through its internal pulldown resistor.
Figure 2. V
CC
and V
IO
Power Sequencing
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