Datasheet
ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x
,
MSP430F676x
,
MSP430F674x
www.ti.com
SLAS768D –SEPTEMBER 2012–REVISED DECEMBER 2013
SD24_B Performance (continued)
f
SD24
= 1 MHz, SD24OSRx = 256, SD24REFON = 1
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SD24GAIN: 1, with external reference (1.2 V) 3 V -1 +1
E
G
Gain error
(1)
SD24GAIN: 8, with external reference (1.2 V) 3 V -2 +2 %
SD24GAIN: 32, with external reference (1.2 V) 3 V -2 +2
Gain error temperature
ΔE
G
/ΔT coefficient
(2)
, internal SD24GAIN: 1, 8, or 32 (with internal reference) 3 V 80 ppm/°C
reference
SD24GAIN: 1 (with external reference) 3 V 15
Gain error temperature
ΔE
G
/ΔT coefficient
(2)
, external SD24GAIN: 8 (with external reference) 3 V 15 ppm/°C
reference
SD24GAIN: 32 (with external reference) 3 V 15
SD24GAIN: 1 3 V 0.1
ΔE
G
/ΔV
CC
Gain error vs V
CC
(3)
SD24GAIN: 8 3 V 0.1 %/V
SD24GAIN: 32 3 V 0.4
SD24GAIN: 1 (with Vdiff = 0V) 3 V 2.3
E
OS
[V] Offset error
(4)
SD24GAIN: 8 3 V 1 mV
SD24GAIN: 32 3 V 0.5
SD24GAIN: 1 (with Vdiff = 0V) 3 V -0.2 +0.2 % FS
E
OS
[FS] Offset error
(4)
SD24GAIN: 8 3 V -0.7 +0.7 % FS
SD24GAIN: 32 3 V -1.4 +1.4 % FS
SD24GAIN: 1 3 V 2
Offset error temperature
ΔE
OS
/ΔT SD24GAIN: 8 3 V 0.25 µV/°C
coefficient
(5)
SD24GAIN: 32 3 V 0.1
SD24GAIN: 1 3 V 500
ΔE
OS
/ΔV
CC
Offset error vs V
CC
(6)
SD24GAIN: 8 3 V 125 µV/V
SD24GAIN: 32 3 V 50
SD24GAIN: 1 3 V -120
Common mode rejection at
CMRR,DC SD24GAIN: 8 3 V -110 dB
DC
(7)
SD24GAIN: 32 3 V -100
(1) The gain error E
G
specifies the deviation of the actual gain G
act
from the nominal gain G
nom
: E
G
= (G
act
- G
nom
)/G
nom
. It covers process,
temperature and supply voltage variations.
(2) The gain error temperature coefficient ΔE
G
/ ΔT specifies the variation of the gain error E
G
over temperature (E
G
(T) = (G
act
(T) -
G
nom
)/G
nom
) using the box method (that is, minimum and maximum values):
ΔE
G
/ ΔT = (MAX(E
G
(T)) - MIN(E
G
(T) ) / (MAX(T) - MIN(T)) = (MAX(G
act
(T)) - MIN(G
act
(T)) / G
nom
/ (MAX(T) - MIN(T))
with T ranging from -40°C to +85°C.
(3) The gain error vs V
CC
coefficient ΔE
G
/ ΔV
CC
specifies the variation of the gain error E
G
over supply voltage (E
G
(V
CC
) = (G
act
(V
CC
) -
G
nom
)/G
nom
) using the box method (that is, minimum and maximum values):
ΔE
G
/ ΔV
CC
= (MAX(E
G
(V
CC
)) - MIN(E
G
(V
CC
) ) / (MAX(V
CC
) - MIN(V
CC
)) = (MAX(G
act
(V
CC
)) - MIN(G
act
(V
CC
)) / G
nom
/ (MAX(V
CC
) -
MIN(V
CC
))
with V
CC
ranging from 2.4V to 3.6V.
(4) The offset error E
OS
is measured with shorted inputs in 2s complement mode with +100% FS = V
REF
/G and -100% FS = -V
REF
/G.
Conversion between E
OS
[FS] and E
OS
[V] is as follows: E
OS
[FS] = E
OS
[V]×G/V
REF
; E
OS
[V] = E
OS
[FS]×V
REF
/G.
(5) The offset error temperature coefficient ΔE
OS
/ ΔT specifies the variation of the offset error E
OS
over temperature using the box method
(that is, minimum and maximum values):
ΔE
OS
/ ΔT = (MAX(E
OS
(T)) - MIN(E
OS
(T) ) / (MAX(T) - MIN(T))
with T ranging from -40°C to +85°C.
(6) The offset error vs V
CC
ΔE
OS
/ ΔV
CC
specifies the variation of the offset error E
OS
over supply voltage using the box method (that is,
minimum and maximum values):
ΔE
OS
/ ΔV
CC
= (MAX(E
OS
(V
CC
)) - MIN(E
OS
(V
CC
) ) / (MAX(V
CC
) - MIN(V
CC
))
with V
CC
ranging from 2.4V to 3.6V.
(7) The DC CMRR specifies the change in the measured differential input voltage value when the common mode voltage varies:
DC CMRR = -20log(Δ
MAX
/FSR) with Δ
MAX
being the difference between the minium value and the maximum value measured when
sweeping the common mode voltage.
The DC CMRR is measured with both inputs connected to the common mode voltage (that is, no differential input signal is applied), and
the common mode voltage is swept from -1V to V
CC
.
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