Datasheet
PZ PACKAGE
1SD0P0
2SD0N0
3SD1P0
4SD1N0
5SD2P0
6SD2N0
7SD3P0
8SD3N0
9VASYS2
10AVSS2
11VREF
12SD4P0
13SD4N0
14SD5P0
15SD5N0
16SD6P0
17SD6N0
18AVSS1
19AVCC
20VASYS1
21AUXVCC2
22AUXVCC1
23VDSYS1
24DVCC
25DVSS1
26
VCORE
27
XIN
28
XOUT
29
AUXVCC3
30
RTCCAP1
31
RTCCAP0
32
P1.5/SMCLK/CB0/A5
33
P1.4/MCLK/CB1/A4
34
P1.3/ADC10CLK/A3
35
P1.2/ACLK/A2
36
P1.1/TA2.1/CBOUT/VeREF+/A1
37
P1.0/TA1.1/VeREF-/A0
38
COM0
39
COM1
40
P1.6/COM2
41
P1.7/COM3
42
P2.0/PM_TA0.0/BSL_TX/COM4
43
P2.1/PM_TA0.1/BSL_RX/COM5
44
P2.2/PM_TA0.2/COM6
45
P2.3/PM_TA1.0/COM7
46
LCDCAP/R33
47
P2.4/PM_TA2.0/R23
48
P2.5/PM_UCB0SOMI/PM_UCB0SCL/LCDREF/R13
49
P2.6/PM_UCB0SIMO/PM_UCB0SDA/R03
50
P2.7/PM_UCB0CLK/CB2
51 P3.0/PM_UCA0RXD/PM_UCA0SOMI
52 P3.1/PM_UCA0TXD/PM_UCA0SIMO/S39
53 P3.2/PM_UCA0CLK/S38
54 P3.3/PM_UCA1CLK/S37
55 P3.4/PM_UCA1RXD/PM_UCA1SOMI/S36
56 P3.5/PM_UCA1TXD/PM_UCA1SIMO/S35
57 P3.6/PM_UCA2RXD/PM_UCA2SOMI/S34
58 P3.7/PM_UCA2TXD/PM_UCA2SIMO/S33
59 P4.0/PM_UCA2CLK/S32
60 P4.1/PM_UCA3RXD/PM_UCA3SOMI/S31
61 P4.4/PM_UCA3TXD/PM_UCA3SIMO/S30
62 P4.3/PM_UCA3CLK/S29
63 P4.4/PM_UCB1SOMI/PM_UCB1SCL/S28
64 P4.5/PM_UCB1SIMO/PM_UCB1SDA/S27
65 P4.6/PM_UCB1CLK/S26
66 P4.7/PM_TA3.0/S25
67
P5.0/SDCLK/S24
68 P5.1/SD0DIO/S23
69 P5.2/SD1DIO/S22
70 P5.3/SD2DIO/S21
71 P5.4/SD3DIO/S20
72 P5.5/SD4DIO/S19
73 P5.6/SD5DIO/S18
74 P5.7/SD6DIO/S17
75 VDSYS2
76
DVSS2
77
P6.0/S16
78
P6.1/S15
79
P6.2/S14
80
P6.3/S13
81
P6.4/S12
82
P6.5/S11
83
P6.6/S10
84
P6.7/S9
85
P7.0/S8
86
P7.1/S7
87
P7.2/S6
88
P7.3/S5
89
P7.4/S4
90
P7.5/S3
91
P7.6/S2
92
P7.7/S1
93
P8.0/S0
94
P8.1/TACLK/RTCCLKCB3
95
TEST/SBWTCK
96
PJ.0/TDO
97
PJ.1TDI/TCLK
98
PJ.2/TMS
99
PJ.3/TCK
100
RST/NMI/SBWTDIO
ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x
,
MSP430F676x
,
MSP430F674x
SLAS768D –SEPTEMBER 2012–REVISED DECEMBER 2013
www.ti.com
Pin Designation, MSP430F677xIPZ
D. The secondary digital functions on Ports P2, P3 and P4 are fully mappable. The pin designation shows only the
default mapping. See Table 15 for details.
E. The pair of pins VDSYS1 and VDSYS2, VASYS1 and VASYS2 must be connected externally on board for proper
device operation.
F. CAUTION: The LCDCAP/R33 pin must be connected to DVSS if it is not used.
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