Datasheet

ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x , MSP430F676x , MSP430F674x
www.ti.com SLAS768D –SEPTEMBER 2012–REVISED DECEMBER 2013
Table 33. SYS Registers (Base Address: 0180h)
REGISTER DESCRIPTION REGISTER OFFSET
System control SYSCTL 00h
Bootstrap loader configuration area SYSBSLC 02h
JTAG mailbox control SYSJMBC 06h
JTAG mailbox input 0 SYSJMBI0 08h
JTAG mailbox input 1 SYSJMBI1 0Ah
JTAG mailbox output 0 SYSJMBO0 0Ch
JTAG mailbox output 1 SYSJMBO1 0Eh
Bus Error vector generator SYSBERRIV 18h
User NMI vector generator SYSUNIV 1Ah
System NMI vector generator SYSSNIV 1Ch
Reset vector generator SYSRSTIV 1Eh
Table 34. Shared Reference Registers (Base Address: 01B0h)
REGISTER DESCRIPTION REGISTER OFFSET
Shared reference control REFCTL 00h
Table 35. Port Mapping Controller (Base Address: 01C0h)
REGISTER DESCRIPTION REGISTER OFFSET
Port mapping password register PMAPPWD 00h
Port mapping control register PMAPCTL 02h
Table 36. Port Mapping for Port P2 (Base Address: 01D0h)
REGISTER DESCRIPTION REGISTER OFFSET
Port P2.0 mapping register P2MAP0 00h
Port P2.1 mapping register P2MAP1 01h
Port P2.2 mapping register P2MAP2 02h
Port P2.3 mapping register P2MAP3 03h
Port P2.4 mapping register P2MAP4 04h
Port P2.5 mapping register P2MAP5 05h
Port P2.6 mapping register P2MAP6 06h
Port P2.7 mapping register P2MAP7 07h
Table 37. Port Mapping for Port P3 (Base Address: 01D8h)
REGISTER DESCRIPTION REGISTER OFFSET
Port P3.0 mapping register P3MAP0 00h
Port P3.1 mapping register P3MAP1 01h
Port P3.2 mapping register P3MAP2 02h
Port P3.3 mapping register P3MAP3 03h
Port P3.4 mapping register P3MAP4 04h
Port P3.5 mapping register P3MAP5 05h
Port P3.6 mapping register P3MAP6 06h
Port P3.7 mapping register P3MAP7 07h
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