Datasheet

ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x , MSP430F676x , MSP430F674x
SLAS768D –SEPTEMBER 2012–REVISED DECEMBER 2013 www.ti.com
Table 26. Special Function Registers (Base Address: 0100h)
REGISTER DESCRIPTION REGISTER OFFSET
SFR interrupt enable SFRIE1 00h
SFR interrupt flag SFRIFG1 02h
SFR reset pin control SFRRPCR 04h
Table 27. PMM Registers (Base Address: 0120h)
REGISTER DESCRIPTION REGISTER OFFSET
PMM Control 0 PMMCTL0 00h
PMM control 1 PMMCTL1 02h
SVS high side control SVSMHCTL 04h
SVS low side control SVSMLCTL 06h
PMM interrupt flags PMMIFG 0Ch
PMM interrupt enable PMMIE 0Eh
PMM Power Mode 5 control register 0 PM5CTL0 10h
Table 28. Flash Control Registers (Base Address: 0140h)
REGISTER DESCRIPTION REGISTER OFFSET
Flash control 1 FCTL1 00h
Flash control 3 FCTL3 04h
Flash control 4 FCTL4 06h
Table 29. CRC16 Registers (Base Address: 0150h)
REGISTER DESCRIPTION REGISTER OFFSET
CRC data input CRC16DI 00h
CRC result CRCINIRES 04h
Table 30. RAM Control Registers (Base Address: 0158h)
REGISTER DESCRIPTION REGISTER OFFSET
RAM control 0 RCCTL0 00h
Table 31. Watchdog Registers (Base Address: 015Ch)
REGISTER DESCRIPTION REGISTER OFFSET
Watchdog timer control WDTCTL 00h
Table 32. UCS Registers (Base Address: 0160h)
REGISTER DESCRIPTION REGISTER OFFSET
UCS control 0 UCSCTL0 00h
UCS control 1 UCSCTL1 02h
UCS control 2 UCSCTL2 04h
UCS control 3 UCSCTL3 06h
UCS control 4 UCSCTL4 08h
UCS control 5 UCSCTL5 0Ah
UCS control 6 UCSCTL6 0Ch
UCS control 7 UCSCTL7 0Eh
UCS control 8 UCSCTL8 10h
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