Datasheet
ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x
,
MSP430F676x
,
MSP430F674x
SLAS768D –SEPTEMBER 2012–REVISED DECEMBER 2013
www.ti.com
Family members available are summarized in Table 1.
Table 1. Family Members
(1)(2)
eUSCI
Flash SRAM SD24_B ADC10_A Package
Channel A: Channel B:
Device Timer_A
(3)
I/O
(KB) (KB) Converters Channels Type
UART, IrDA,
SPI, I
2
C
SPI
MSP430F6779IPEU 512 32 7 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6778IPEU 512 16 7 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6777IPEU 256 32 7 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6776IPEU 256 16 7 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6775IPEU 128 16 7 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6769IPEU 512 32 6 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6768IPEU 512 16 6 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6767IPEU 256 32 6 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6766IPEU 256 16 6 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6765IPEU 128 16 6 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6749IPEU 512 32 4 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6748IPEU 512 16 4 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6747IPEU 256 32 4 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6746IPEU 256 16 4 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6745IPEU 128 16 4 6 ext, 2 int 3, 2, 2, 2 4 2 90 128 PEU
MSP430F6779IPZ 512 32 7 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6778IPZ 512 16 7 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6777IPZ 256 32 7 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6776IPZ 256 16 7 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6775IPZ 128 16 7 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6769IPZ 512 32 6 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6768IPZ 512 16 6 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6767IPZ 256 32 6 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6766IPZ 256 16 6 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6765IPZ 128 16 6 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6749IPZ 512 32 4 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6748IPZ 512 16 4 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6747IPZ 256 32 4 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6746IPZ 256 16 4 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
MSP430F6745IPZ 128 16 4 6 ext, 2 int 3, 2, 2, 2 4 2 62 100 PZ
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
4 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated