Datasheet
(MSP430F677xIPZ only)
P2.4/PM_TA2.0
P2.5/PM_UCB0SOMI/PM_UCB0SCL
P2.6/PM_UCB0SIMO/PM_UCB0SDA
1
DVCC
DVSS
0
Bus
Keeper
D
EN
P2DS.x
EN
SET
Q
Interrupt
Edge
Select
P2REN.x
P2DIR.x
P2OUT.x
from Port Mapping
P2SEL0.x
P2IN.x
to Port Mapping
P2IE.x
P2IRQ.x
P2IFG.x
P2SEL.x
P2IES.x
from Port Mapping
P2MAP.x = PMAP_ANALOG
1
0
1
0
ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x
,
MSP430F676x
,
MSP430F674x
www.ti.com
SLAS768D –SEPTEMBER 2012–REVISED DECEMBER 2013
Port P2, P2.4 Through P2.6, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)
Table 75. Port P2 (P2.4 and P2.6) Pin Functions (MSP430F677xIPZ Only)
CONTROL BITS OR SIGNALS
(1)
PIN NAME (P2.x) x FUNCTION
P2DIR.x P2SEL0.x P2MAP.x
P2.4 (I/O) I:0; O:1 0 X
P2.4/PM_TA2.0/R23 4 Mapped secondary digital function X 1 ≤ 30
R23 X 1 = 31
P2.5 (I/O) I:0; O:1 0 X
P2.5/PM_UCB0SOMI/
5 Mapped secondary digital function X 1 ≤ 30
PM_UCB0SCL/R13
R13 X 1 = 31
P2.6 (I/O) I:0; O:1 0 X
P2.6/PM_UCB0SIMO/
6 Mapped secondary digital function X 1 ≤ 30
PM_UCB0SDA/R03
R03 X 1 = 31
(1) X = don't care
Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 105