Datasheet

ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
www.ti.com SLAS554H –MAY 2009–REVISED SEPTEMBER 2013
Low-Power Mode Supply Currents (Into V
CC
) Excluding External Current
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1) (2)
Temperature (T
A
)
PARAMETER V
CC
PMMCOREVx -40°C 25°C 60°C 85°C UNIT
TYP MAX TYP MAX TYP MAX TYP MAX
2.2 V 0 80 100 80 100 80 100 80 100
I
LPM0,1MHz
Low-power mode 0
(3) (4)
µA
3.0 V 3 90 110 90 110 90 110 90 110
2.2 V 0 6.5 11 6.5 11 6.5 11 6.5 11
I
LPM2
Low-power mode 2
(5) (4)
µA
3.0 V 3 7.5 12 7.5 12 7.5 12 7.5 12
0 1.8 2.0 2.6 3.0 4.0 4.4 5.9
1 1.9 2.1 3.2 4.8
Low-power mode 3, crystal
I
LPM3,XT1LF
3.0 V µA
mode
(6) (4)
2 2.0 2.2 3.4 5.1
3 2.0 2.2 2.9 3.5 4.8 5.3 7.4
0 0.9 1.1 2.3 2.1 3.7 3.5 5.6
1 1.0 1.2 2.3 3.9
Low-power mode 3,
I
LPM3,VLO
3.0 V µA
VLO mode
(7) (4)
2 1.1 1.3 2.5 4.2
3 1.1 1.3 2.6 2.6 4.5 4.4 7.1
0 0.8 1.0 2.2 2.0 3.6 3.4 5.5
1 0.9 1.1 2.2 3.8
I
LPM4
Low-power mode 4
(8) (4)
3.0 V µA
2 1.0 1.2 2.4 4.1
3 1.0 1.2 2.5 2.5 4.4 4.3 7.0
(1) All inputs are tied to 0 V or to V
CC
. Outputs do not source or sink any current.
(2) The currents are characterized with a Micro Crystal MS1V-T1K crystal with a load capacitance of 12.5 pF. The internal and external load
capacitance are chosen to closely match the required 12.5 pF.
(3) Current for watchdog timer clocked by SMCLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 0, OSCOFF = 0 (LPM0); f
ACLK
= 32768 Hz, f
MCLK
= 0 MHz, f
SMCLK
= f
DCO
= 1 MHz
(4) Current for brownout, high side supervisor (SVS
H
) normal mode included. Low side supervisor and monitors disabled (SVS
L
, SVM
L
).
High side monitor disabled (SVM
H
). RAM retention enabled.
(5) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 0, SCG1 = 1, OSCOFF = 0 (LPM2); f
ACLK
= 32768 Hz, f
MCLK
= 0 MHz, f
SMCLK
= f
DCO
= 0 MHz; DCO setting = 1
MHz operation, DCO bias generator enabled.
(6) Current for watchdog timer and RTC clocked by ACLK included. ACLK = low frequency crystal operation (XTS = 0, XT1DRIVEx = 0).
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f
ACLK
= 32768 Hz, f
MCLK
= f
SMCLK
= f
DCO
= 0 MHz
(7) Current for watchdog timer and RTC clocked by ACLK included. ACLK = VLO.
CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 0 (LPM3); f
ACLK
= f
VLO
, f
MCLK
= f
SMCLK
= f
DCO
= 0 MHz
(8) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4); f
DCO
= f
ACLK
= f
MCLK
= f
SMCLK
= 0 MHz
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