Datasheet
ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
www.ti.com
SLAS554H –MAY 2009–REVISED SEPTEMBER 2013
Table 3. CC430F513x Terminal Functions
TERMINAL
I/O
(1)
DESCRIPTION
NAME NO.
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: TA1 CCR1 compare output or capture input
P2.2/ PM_TA1CCR1A/ CB2/ A2 1 I/O
Comparator_B input CB2
Analog input A2 – 12-bit ADC
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: TA1 CCR0 compare output or capture input
P2.1/ PM_TA1CCR0A/ CB1/ A1 2 I/O
Comparator_B input CB1
Analog input A1 – 12-bit ADC
General-purpose digital I/O with port interrupt and mappable secondary function
P2.0/ PM_CBOUT1/ PM_TA1CLK/ Default mapping: Comparator_B output; TA1 clock input
3 I/O
CB0/ A0 Comparator_B input CB0
Analog input A0 – 12-bit ADC
P1.7/ PM_UCA0CLK/ General-purpose digital I/O with port interrupt and mappable secondary function
4 I/O
PM_UCB0STE Default mapping: USCI_A0 clock input/output / USCI_B0 SPI slave transmit enable
P1.6/ PM_UCA0TXD/ General-purpose digital I/O with port interrupt and mappable secondary function
5 I/O
PM_UCA0SIMO Default mapping: USCI_A0 UART transmit data; USCI_A0 SPI slave in master out
P1.5/ PM_UCA0RXD/ General-purpose digital I/O with port interrupt and mappable secondary function
6 I/O
PM_UCA0SOMI Default mapping: USCI_A0 UART receive data; USCI_A0 SPI slave out master in
VCORE 7 Regulated core power supply
DVCC 8 Digital power supply
P1.4/ PM_UCB0CLK/ General-purpose digital I/O with port interrupt and mappable secondary function
9 I/O
PM_UCA0STE Default mapping: USCI_B0 clock input/output / USCI_A0 SPI slave transmit enable
P1.3/ PM_UCB0SIMO/ General-purpose digital I/O with port interrupt and mappable secondary function
10 I/O
PM_UCB0SDA Default mapping: USCI_B0 SPI slave in master out/USCI_B0 I2C data
P1.2/ PM_UCB0SOMI/ General-purpose digital I/O with port interrupt and mappable secondary function
11 I/O
PM_UCB0SCL Default mapping: USCI_B0 SPI slave out master in/UCSI_B0 I2C clock
General-purpose digital I/O with port interrupt and mappable secondary function
P1.1/ PM_RFGDO2 12 I/O
Default mapping: Radio GDO2 output
General-purpose digital I/O with port interrupt and mappable secondary function
P1.0/ PM_RFGDO0 13 I/O
Default mapping: Radio GDO0 output
General-purpose digital I/O with mappable secondary function
P3.7/ PM_SMCLK 14 I/O
Default mapping: SMCLK output
General-purpose digital I/O with mappable secondary function
P3.6/ PM_RFGDO1 15 I/O
Default mapping: Radio GDO1 output
General-purpose digital I/O with mappable secondary function
P3.5/ PM_TA0CCR4A 16 I/O
Default mapping: TA0 CCR4 compare output or capture input
General-purpose digital I/O with mappable secondary function
P3.4/ PM_TA0CCR3A 17 I/O
Default mapping: TA0 CCR3 compare output or capture input
General-purpose digital I/O with mappable secondary function
P3.3/ PM_TA0CCR2A 18 I/O
Default mapping: TA0 CCR2 compare output or capture input
General-purpose digital I/O with mappable secondary function
P3.2/ PM_TA0CCR1A 19 I/O
Default mapping: TA0 CCR1 compare output or capture input
General-purpose digital I/O with mappable secondary function
P3.1/ PM_TA0CCR0A 20 I/O
Default mapping: TA0 CCR0 compare output or capture input
General-purpose digital I/O with mappable secondary function
P3.0/ PM_CBOUT0/ PM_TA0CLK 21 I/O
Default mapping: Comparator_B output; TA0 clock input
DVCC 22 Digital power supply
P2.7/ PM_ADC12CLK/ General-purpose digital I/O with port interrupt and mappable secondary function
23 I/O
PM_DMAE0 Default mapping: ADC12CLK output; DMA external trigger input
General-purpose digital I/O with port interrupt and mappable secondary function
P2.6/ PM_ACLK 24 I/O
Default mapping: ACLK output
RF_XIN 25 I Input terminal for RF crystal oscillator, or external clock input
RF_XOUT 26 O Output terminal for RF crystal oscillator
AVCC_RF 27 Radio analog power supply
(1) I = input, O = output
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