Datasheet

PRODUCTPREVIEW
MSP432P401R, MSP432P401M
SLAS826 –MARCH 2015 www.ti.com
Table of Contents
1 Device Overview ......................................... 1 6.2 Memory Map ........................................ 61
1.1 Features .............................................. 1 6.3 Memories on the MSP432P401x.................... 66
1.2 Applications........................................... 2 6.4 DMA ................................................. 75
1.3 Description............................................ 2 6.5 Memory Map Access Details........................ 76
1.4 Functional Block Diagram ............................ 3 6.6 Interrupts ............................................ 78
2 Revision History ......................................... 4 6.7 System Control ...................................... 82
3 Device Comparison ..................................... 5 6.8 Peripherals .......................................... 87
4 Terminal Configuration and Functions.............. 6 6.9 Code Development and Debug ..................... 98
4.1 Pin Diagrams ......................................... 6 6.10 Input/Output Schematics........................... 100
4.2 Signal Descriptions.................................. 10 6.11 Device Descriptors (TLV) .......................... 139
5 Specifications........................................... 15 7 Applications, Implementation, and Layout ...... 141
5.1 Absolute Maximum Ratings ........................ 15 7.1 Device Connection and Layout Fundamentals .... 141
7.2 Peripheral and Interface-Specific Design
5.2 ESD Ratings ........................................ 15
Information ......................................... 142
5.3 Recommended Operating Conditions............... 15
8 Device and Documentation Support.............. 144
5.4 Recommended External Components ............. 16
8.1 Device Support..................................... 144
5.5 Operating Mode V
CC
Ranges ....................... 16
8.2 Documentation Support............................ 146
5.6 Operating Mode CPU Frequency Ranges .......... 17
8.3 Trademarks ........................................ 147
5.7 Operating Mode Peripheral Frequency Ranges .... 17
8.4 Electrostatic Discharge Caution ................... 147
5.8 Operating Mode Execution Frequency vs Flash
Wait-State Requirements ........................... 18 8.5 Export Control Notice .............................. 147
5.9 Current Consumption ............................... 19 8.6 Glossary............................................ 147
5.10 Timing and Switching Characteristics ............... 23 9 Mechanical, Packaging, and Orderable
Information............................................. 148
6 Detailed Description ................................... 60
9.1 Packaging Information ............................. 148
6.1 Processor and Execution Features ................. 60
2 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
DATE REVISION COMMENTS
March 2015 * Initial release
4 Revision History Copyright © 2015, Texas Instruments Incorporated
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